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[AMD Public Use]<br>
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sure<br>
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<p style="margin-top: 0px; margin-bottom: 0px;">Thanks & Best Regards!</p>
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<p style="margin-top: 0px; margin-bottom: 0px;">James Zhu<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Sent:</b> Wednesday, June 17, 2020 4:53 PM<br>
<b>To:</b> Zhu, James <James.Zhu@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> kernel test robot <lkp@intel.com><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static</font>
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[AMD Public Use]<br>
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James, please feel free to commit this.</div>
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Alex<br>
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<div id="x_divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of James Zhu <James.Zhu@amd.com><br>
<b>Sent:</b> Wednesday, June 17, 2020 4:41 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Zhu, James <James.Zhu@amd.com>; kernel test robot <lkp@intel.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static</font>
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<div class="x_PlainText">From: kernel test robot <lkp@intel.com><br>
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Fixes: c422a628925d ("drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0")<br>
Signed-off-by: kernel test robot <lkp@intel.com><br>
Signed-off-by: James Zhu <James.Zhu@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 6 +++---<br>
1 file changed, 3 insertions(+), 3 deletions(-)<br>
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diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c<br>
index 261afbb504bd..ba1c4fbc19dc 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c<br>
@@ -443,7 +443,7 @@ static void vcn_v2_5_mc_resume(struct amdgpu_device *adev)<br>
}<br>
}<br>
<br>
-void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect)<br>
+static void vcn_v2_5_mc_resume_dpg_mode(struct amdgpu_device *adev, int inst_idx, bool indirect)<br>
{<br>
uint32_t size = AMDGPU_GPU_PAGE_ALIGN(adev->vcn.fw->size + 4);<br>
uint32_t offset;<br>
@@ -657,7 +657,7 @@ static void vcn_v2_5_disable_clock_gating(struct amdgpu_device *adev)<br>
}<br>
}<br>
<br>
-void vcn_v2_5_clock_gating_dpg_mode(struct amdgpu_device *adev,<br>
+static void vcn_v2_5_clock_gating_dpg_mode(struct amdgpu_device *adev,<br>
uint8_t sram_sel, int inst_idx, uint8_t indirect)<br>
{<br>
uint32_t reg_data = 0;<br>
@@ -1300,7 +1300,7 @@ static int vcn_v2_5_sriov_start(struct amdgpu_device *adev)<br>
return vcn_v2_5_mmsch_start(adev, &adev->virt.mm_table);<br>
}<br>
<br>
-int vcn_v2_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx)<br>
+static int vcn_v2_5_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx)<br>
{<br>
int ret_code = 0;<br>
uint32_t tmp;<br>
-- <br>
2.17.1<br>
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