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[AMD Official Use Only - Internal Distribution Only]<br>
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<p class="MsoNormal"><span style="mso-fareast-language:EN-US">Reviewed-by: Leo Liu <leo.liu@amd.com><o:p></o:p></span></p>
<p class="MsoNormal"><span style="mso-fareast-language:EN-US"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="mso-fareast-language:EN-US"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span lang="EN-US">From:</span></b><span lang="EN-US"> Zhang, Boyuan <Boyuan.Zhang@amd.com>
<br>
<b>Sent:</b> July 22, 2020 5:50 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Liu, Leo <Leo.Liu@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu: update dec ring test for VCN 3.0<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p style="margin:15.0pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:#0078D7">[AMD Official Use Only - Internal Distribution Only]<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="xmsonormal"><span style="color:black">To enable SW ring for VCN 3.0</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> </span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">Signed-off-by: Boyuan Zhang <<a href="mailto:boyuan.zhang@amd.com">boyuan.zhang@amd.com</a>></span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">---</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> 1 file changed, 1 insertion(+), 1 deletion(-)</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> </span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">index ddc1c43e09a8..8adebb3b2a3f 100644</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">@@ -1372,7 +1372,7 @@ static const struct amdgpu_ring_funcs vcn_v3_0_dec_ring_vm_funcs = {</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> .emit_ib = vcn_v2_0_dec_ring_emit_ib,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> .emit_fence = vcn_v2_0_dec_ring_emit_fence,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> .emit_vm_flush = vcn_v2_0_dec_ring_emit_vm_flush,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">- .test_ring = amdgpu_vcn_dec_ring_test_ring,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">+ .test_ring = vcn_v2_0_dec_ring_test_ring,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> .test_ib = amdgpu_vcn_dec_ring_test_ib,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> .insert_nop = vcn_v2_0_dec_ring_insert_nop,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black"> .insert_start = vcn_v2_0_dec_ring_insert_start,</span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">-- </span><o:p></o:p></p>
<p class="xmsonormal"><span style="color:black">2.17.1</span><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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