<div dir="ltr"><div>Hello,</div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Jul 24, 2020 at 8:31 PM Alex Deucher <<a href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">On Wed, Jul 22, 2020 at 3:57 AM Mauro Rossi <<a href="mailto:issor.oruam@gmail.com" target="_blank">issor.oruam@gmail.com</a>> wrote:<br> ><br> > Hello,<br> > re-sending and copying full DL<br> ><br> > On Wed, Jul 22, 2020 at 4:51 AM Alex Deucher <<a href="mailto:alexdeucher@gmail.com" target="_blank">alexdeucher@gmail.com</a>> wrote:<br> >><br> >> On Mon, Jul 20, 2020 at 6:00 AM Mauro Rossi <<a href="mailto:issor.oruam@gmail.com" target="_blank">issor.oruam@gmail.com</a>> wrote:<br> >> ><br> >> > Hi Christian,<br> >> ><br> >> > On Mon, Jul 20, 2020 at 11:00 AM Christian König<br> >> > <<a href="mailto:ckoenig.leichtzumerken@gmail.com" target="_blank">ckoenig.leichtzumerken@gmail.com</a>> wrote:<br> >> > ><br> >> > > Hi Mauro,<br> >> > ><br> >> > > I'm not deep into the whole DC design, so just some general high level<br> >> > > comments on the cover letter:<br> >> > ><br> >> > > 1. Please add a subject line to the cover letter, my spam filter thinks<br> >> > > that this is suspicious otherwise.<br> >> ><br> >> > My mistake in the editing of covert letter with git send-email,<br> >> > I may have forgot to keep the Subject at the top<br> >> ><br> >> > ><br> >> > > 2. Then you should probably note how well (badly?) is that tested. Since<br> >> > > you noted proof of concept it might not even work.<br> >> ><br> >> > The Changelog is to be read as:<br> >> ><br> >> > [RFC] was the initial Proof of concept was the RFC and [PATCH v2] was<br> >> > just a rebase onto amd-staging-drm-next<br> >> ><br> >> > this series [PATCH v3] has all the known changes required for DCE6 specificity<br> >> > and based on a long offline thread with Alexander Deutcher and past<br> >> > dri-devel chats with Harry Wentland.<br> >> ><br> >> > It was tested for my possibilities of testing with HD7750 and HD7950,<br> >> > with checks in dmesg output for not getting "missing registers/masks"<br> >> > kernel WARNING<br> >> > and with kernel build on Ubuntu 20.04 and with android-x86<br> >> ><br> >> > The proposal I made to Alex is that AMD testing systems will be used<br> >> > for further regression testing,<br> >> > as part of review and validation for eligibility to amd-staging-drm-next<br> >> ><br> >><br> >> We will certainly test it once it lands, but presumably this is<br> >> working on the SI cards you have access to?<br> ><br> ><br> > Yes, most of my testing was done with android-x86 Android CTS (EGL, GLES2, GLES3, VK)<br> ><br> > I am also in contact with a person with Firepro W5130M who is running a piglit session<br> ><br> > I had bought an HD7850 to test with Pitcairn, but it arrived as defective so I could not test with Pitcair<br> ><br> ><br> >><br> >> > ><br> >> > > 3. How feature complete (HDMI audio?, Freesync?) is it?<br> >> ><br> >> > All the changes in DC impacting DCE8 (dc/dce80 path) were ported to<br> >> > DCE6 (dc/dce60 path) in the last two years from initial submission<br> >> ><br> >> > ><br> >> > > Apart from that it looks like a rather impressive piece of work :)<br> >> > ><br> >> > > Cheers,<br> >> > > Christian.<br> >> ><br> >> > Thanks,<br> >> > please consider that most of the latest DCE6 specific parts were<br> >> > possible due to recent Alex support in getting the correct DCE6<br> >> > headers,<br> >> > his suggestions and continuous feedback.<br> >> ><br> >> > I would suggest that Alex comments on the proposed next steps to follow.<br> >><br> >> The code looks pretty good to me. I'd like to get some feedback from<br> >> the display team to see if they have any concerns, but beyond that I<br> >> think we can pull it into the tree and continue improving it there.<br> >> Do you have a link to a git tree I can pull directly that contains<br> >> these patches? Is this the right branch?<br> >> <a href="https://github.com/maurossi/linux/commits/kernel-5.8rc4_si_next" rel="noreferrer" target="_blank">https://github.com/maurossi/linux/commits/kernel-5.8rc4_si_next</a><br> >><br> >> Thanks!<br> >><br> >> Alex<br> ><br> ><br> > The following branch was pushed with the series on top of amd-staging-drm-next<br> ><br> > <a href="https://github.com/maurossi/linux/commits/kernel-5.6_si_drm-next" rel="noreferrer" target="_blank">https://github.com/maurossi/linux/commits/kernel-5.6_si_drm-next</a><br> <br> I gave this a quick test on all of the SI asics and the various<br> monitors I had available and it looks good. A few minor patches I<br> noticed are attached. If they look good to you, I'll squash them into<br> the series when I commit it. I've pushed it to my fdo tree as well:<br> <a href="https://cgit.freedesktop.org/~agd5f/linux/log/?h=si_dc_support" rel="noreferrer" target="_blank">https://cgit.freedesktop.org/~agd5f/linux/log/?h=si_dc_support</a><br> <br> Thanks!<br> <br> Alex<br></blockquote><div><br></div><div>The new patches are ok and with the following infomation about piglit tests, </div><div>the series may be good to go.</div><div><br></div><div>I have performed piglit tests on Tahiti HD7950 on kernel 5.8.0-rc6 with AMD DC support for SI</div><div>and comparison with vanilla kernel 5.8.0-rc6</div><div><br></div><div>Results are the following</div><div><br></div><div><div><font face="monospace">[piglit gpu tests with kernel 5.8.0-rc6-amddcsi]<br><br></font></div><div><font face="monospace">utente@utente-desktop:~/piglit$ ./piglit run gpu .<br>[26714/26714] skip: 1731, pass: 24669, warn: 15, fail: 288, crash: 11 <br>Thank you for running Piglit! <br>Results have been written to /home/utente/piglit<br><br>[piglit gpu tests with vanilla 5.8.0-rc6]<br><br></font></div><div><font face="monospace">utente@utente-desktop:~/piglit$ ./piglit run gpu .<br>[26714/26714] skip: 1731, pass: 24673, warn: 13, fail: 283, crash: 14 <br>Thank you for running Piglit! <br>Results have been written to /home/utente/piglit</font></div></div><div><br></div><div><div>In the attachment the comparison of "5.8.0-rc6-amddcsi" vs "5.8.0-rc6" vanilla </div><div>and viceversa, I see no significant regression and in the delta of failed tests I don't recognize DC related test cases,</div></div><div>but you may also have a look.</div><div><br></div><div>dmesg for "5.8.0-rc6-amddcsi" is also provide the check the crashes<br></div><div><br></div><div>Regarding the other user testing the series with Firepro W5130M</div><div>he found an already existing issue in amdgpu si_support=1 which is independent from my series and matches a problem alrady reported. [1]</div><div><br></div><div>Mauro<br></div><div><br></div><div>[1] <a href="https://bbs.archlinux.org/viewtopic.php?id=249097">https://bbs.archlinux.org/viewtopic.php?id=249097</a></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"> <br> ><br> >><br> >><br> >> ><br> >> > Mauro<br> >> ><br> >> > ><br> >> > > Am 16.07.20 um 23:22 schrieb Mauro Rossi:<br> >> > > > The series adds SI support to AMD DC<br> >> > > ><br> >> > > > Changelog:<br> >> > > ><br> >> > > > [RFC]<br> >> > > > Preliminar Proof Of Concept, with DCE8 headers still used in dce60_resources.c<br> >> > > ><br> >> > > > [PATCH v2]<br> >> > > > Rebase on amd-staging-drm-next dated 17-Oct-2018<br> >> > > ><br> >> > > > [PATCH v3]<br> >> > > > Add support for DCE6 specific headers,<br> >> > > > ad hoc DCE6 macros, funtions and fixes,<br> >> > > > rebase on current amd-staging-drm-next<br> >> > > ><br> >> > > ><br> >> > > > Commits [01/27]..[08/27] SI support added in various DC components<br> >> > > ><br> >> > > > [PATCH v3 01/27] drm/amdgpu: add some required DCE6 registers (v6)<br> >> > > > [PATCH v3 02/27] drm/amd/display: add asics info for SI parts<br> >> > > > [PATCH v3 03/27] drm/amd/display: dc/dce: add initial DCE6 support (v9b)<br> >> > > > [PATCH v3 04/27] drm/amd/display: dc/core: add SI/DCE6 support (v2)<br> >> > > > [PATCH v3 05/27] drm/amd/display: dc/bios: add support for DCE6<br> >> > > > [PATCH v3 06/27] drm/amd/display: dc/gpio: add support for DCE6 (v2)<br> >> > > > [PATCH v3 07/27] drm/amd/display: dc/irq: add support for DCE6 (v4)<br> >> > > > [PATCH v3 08/27] drm/amd/display: amdgpu_dm: add SI support (v4)<br> >> > > ><br> >> > > > Commits [09/27]..[24/27] DCE6 specific code adaptions<br> >> > > ><br> >> > > > [PATCH v3 09/27] drm/amd/display: dc/clk_mgr: add support for SI parts (v2)<br> >> > > > [PATCH v3 10/27] drm/amd/display: dc/dce60: set max_cursor_size to 64<br> >> > > > [PATCH v3 11/27] drm/amd/display: dce_audio: add DCE6 specific macros,functions<br> >> > > > [PATCH v3 12/27] drm/amd/display: dce_dmcu: add DCE6 specific macros<br> >> > > > [PATCH v3 13/27] drm/amd/display: dce_hwseq: add DCE6 specific macros,functions<br> >> > > > [PATCH v3 14/27] drm/amd/display: dce_ipp: add DCE6 specific macros,functions<br> >> > > > [PATCH v3 15/27] drm/amd/display: dce_link_encoder: add DCE6 specific macros,functions<br> >> > > > [PATCH v3 16/27] drm/amd/display: dce_mem_input: add DCE6 specific macros,functions<br> >> > > > [PATCH v3 17/27] drm/amd/display: dce_opp: add DCE6 specific macros,functions<br> >> > > > [PATCH v3 18/27] drm/amd/display: dce_transform: add DCE6 specific macros,functions<br> >> > > > [PATCH v3 19/27] drm/amdgpu: add some required DCE6 registers (v7)<br> >> > > > [PATCH v3 20/27] drm/amd/display: dce_transform: DCE6 Scaling Horizontal Filter Init<br> >> > > > [PATCH v3 21/27] drm/amd/display: dce60_hw_sequencer: add DCE6 macros,functions<br> >> > > > [PATCH v3 22/27] drm/amd/display: dce60_hw_sequencer: add DCE6 specific .cursor_lock<br> >> > > > [PATCH v3 23/27] drm/amd/display: dce60_timing_generator: add DCE6 specific functions<br> >> > > > [PATCH v3 24/27] drm/amd/display: dc/dce60: use DCE6 headers (v6)<br> >> > > ><br> >> > > ><br> >> > > > Commits [25/27]..[27/27] SI support final enablements<br> >> > > ><br> >> > > > [PATCH v3 25/27] drm/amd/display: create plane rotation property for Bonarie and later<br> >> > > > [PATCH v3 26/27] drm/amdgpu: enable DC support for SI parts (v2)<br> >> > > > [PATCH v3 27/27] drm/amd/display: enable SI support in the Kconfig (v2)<br> >> > > ><br> >> > > ><br> >> > > > Signed-off-by: Mauro Rossi <<a href="mailto:issor.oruam@gmail.com" target="_blank">issor.oruam@gmail.com</a>><br> >> > > ><br> >> > > > _______________________________________________<br> >> > > > amd-gfx mailing list<br> >> > > > <a href="mailto:amd-gfx@lists.freedesktop.org" target="_blank">amd-gfx@lists.freedesktop.org</a><br> >> > > > <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><br> >> > ><br> >> > _______________________________________________<br> >> > amd-gfx mailing list<br> >> > <a href="mailto:amd-gfx@lists.freedesktop.org" target="_blank">amd-gfx@lists.freedesktop.org</a><br> >> > <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" rel="noreferrer" target="_blank">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><br> </blockquote></div></div>