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[AMD Official Use Only - Internal Distribution Only]<br>
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Acked-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com><br>
<b>Sent:</b> Monday, August 24, 2020 11:11 AM<br>
<b>To:</b> Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Cc:</b> Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Kazlauskas, Nicholas <Nicholas.Kazlauskas@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com><br>
<b>Subject:</b> [PATCH] drm/amd/display: Add DPCS regs for dcn3 link encoder</font>
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<div class="PlainText">dpcs reg are missing for dcn3 link encoder regs list, so add them.<br>
<br>
Also remove<br>
DPCSTX_DEBUG_CONFIG and RDPCSTX_DEBUG_CONFIG as they are unused and<br>
cause compile errors for dcn3<br>
<br>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com><br>
---<br>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h | 2 --<br>
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 1 +<br>
2 files changed, 1 insertion(+), 2 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h<br>
index dcbf28dd72d4..864acd695cbb 100644<br>
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h<br>
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h<br>
@@ -231,8 +231,6 @@<br>
SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \<br>
SRI(DPCSTX_TX_CLOCK_CNTL, DPCSTX, id), \<br>
SRI(DPCSTX_TX_CNTL, DPCSTX, id), \<br>
- SRI(DPCSTX_DEBUG_CONFIG, DPCSTX, id), \<br>
- SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \<br>
SR(RDPCSTX0_RDPCSTX_SCRATCH)<br>
<br>
<br>
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c<br>
index 957fc37b971e..8be4f21169d0 100644<br>
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c<br>
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c<br>
@@ -491,6 +491,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {<br>
[id] = {\<br>
LE_DCN3_REG_LIST(id), \<br>
UNIPHY_DCN2_REG_LIST(phyid), \<br>
+ DPCS_DCN2_REG_LIST(id), \<br>
SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \<br>
}<br>
<br>
-- <br>
2.17.1<br>
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