<html>
<head>
<meta http-equiv="Content-Type" content="text/html;
charset=windows-1252">
</head>
<body>
<div class="moz-cite-prefix">Am 28.08.20 um 02:00 schrieb
Grodzovsky, Andrey:<br>
</div>
<blockquote type="cite"
cite="mid:DM6PR12MB434022205C4915275751D413EA520@DM6PR12MB4340.namprd12.prod.outlook.com">
<meta http-equiv="Content-Type" content="text/html;
charset=windows-1252">
<div>Ping</div>
<div><br>
</div>
<div>Andrey</div>
<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
face="Calibri, sans-serif" color="#000000"><b>From:</b>
amd-gfx <a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx-bounces@lists.freedesktop.org"><amd-gfx-bounces@lists.freedesktop.org></a> on
behalf of Andrey Grodzovsky <a class="moz-txt-link-rfc2396E" href="mailto:Andrey.Grodzovsky@amd.com"><Andrey.Grodzovsky@amd.com></a><br>
<b>Sent:</b> 27 August 2020 10:54<br>
<b>To:</b> Alex Deucher <a class="moz-txt-link-rfc2396E" href="mailto:alexdeucher@gmail.com"><alexdeucher@gmail.com></a><br>
<b>Cc:</b> Deucher, Alexander
<a class="moz-txt-link-rfc2396E" href="mailto:Alexander.Deucher@amd.com"><Alexander.Deucher@amd.com></a>; Das, Nirmoy
<a class="moz-txt-link-rfc2396E" href="mailto:Nirmoy.Das@amd.com"><Nirmoy.Das@amd.com></a>; amd-gfx list
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"><amd-gfx@lists.freedesktop.org></a><br>
<b>Subject:</b> Re: [PATCH 5/7] drm/amdgpu: Fix consecutive
DPC recoveries failure.</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span
style="font-size:11pt;">
<div class="PlainText"><br>
On 8/26/20 11:20 AM, Alex Deucher wrote:<br>
> On Wed, Aug 26, 2020 at 10:46 AM Andrey Grodzovsky<br>
> <a class="moz-txt-link-rfc2396E" href="mailto:andrey.grodzovsky@amd.com"><andrey.grodzovsky@amd.com></a> wrote:<br>
>> DPC recovery after prev. DPC recovery or after
prev. MODE1 reset fails<br>
>> unles you save the cashe the saved PCI confspace
to load it after<br>
>> each new reset.<br>
>> Also use same cached state for other use case of
restoring PCI confspace<br>
>> such as GPU mode1 or VGA switheroo.<br>
>><br>
> We don't want to keep the saved state around in the
pci core<br>
> otherwise, the pci core will assume we are managing
the saved state<br>
> for suspend and resume. I think we want logic like
this:<br>
><br>
> At driver load time:<br>
> pci_save_state(pdev);<br>
> adev->pci_state = pci_store_saved_state(pdev);<br>
> pci_restore_state(adev->pdev);<br>
><br>
> then in the case of dpc, do:<br>
> pci_load_saved_state(pdev, adev->pci_state);<br>
><br>
> For all the other cases, just leave the code as is.<br>
<br>
<br>
Actually, as we already discussed - caching the PCI
confspace only once on boot <br>
and not doing it again after each subsequent<br>
controlled or spontaneous reset runs the risk of loading
back outdated confspace <br>
settings. I am not sure if and when but, is it indeed<br>
possible we make changes to PCI confspace registers during
runtime and so the <br>
cached state from boot might be outdated<br>
to load back ?<br>
</div>
</span></font></div>
</blockquote>
<br>
Well we change the confspace settings for quite a bunch of things.
For example during BAR resize or link speed adjustment.<br>
<br>
Christian.<br>
<br>
<blockquote type="cite"
cite="mid:DM6PR12MB434022205C4915275751D413EA520@DM6PR12MB4340.namprd12.prod.outlook.com">
<div class="BodyFragment"><font size="2"><span
style="font-size:11pt;">
<div class="PlainText">
<br>
Andrey<br>
<br>
<br>
><br>
> Alex<br>
><br>
><br>
>> Signed-off-by: Andrey Grodzovsky
<a class="moz-txt-link-rfc2396E" href="mailto:andrey.grodzovsky@amd.com"><andrey.grodzovsky@amd.com></a><br>
>> ---<br>
>> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 6
+++<br>
>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 60
+++++++++++++++++++++++++++---<br>
>> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 4
+-<br>
>> drivers/gpu/drm/amd/amdgpu/nv.c | 4
+-<br>
>> drivers/gpu/drm/amd/amdgpu/soc15.c | 4
+-<br>
>> 5 files changed, 66 insertions(+), 12
deletions(-)<br>
>><br>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
>> index 3489622..42ee208 100644<br>
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
>> @@ -992,7 +992,9 @@ struct amdgpu_device {<br>
>> atomic_t
throttling_logging_enabled;<br>
>> struct ratelimit_state
throttling_logging_rs;<br>
>> uint32_t
ras_features;<br>
>> +<br>
> Unrelated whitespace changes.<br>
><br>
>> bool in_dpc;<br>
>> + struct pci_saved_state
*pci_state;<br>
>> };<br>
>><br>
>> static inline struct amdgpu_device
*drm_to_adev(struct drm_device *ddev)<br>
>> @@ -1272,6 +1274,10 @@ pci_ers_result_t
amdgpu_pci_mmio_enabled(struct pci_dev *pdev);<br>
>> pci_ers_result_t amdgpu_pci_slot_reset(struct
pci_dev *pdev);<br>
>> void amdgpu_pci_resume(struct pci_dev *pdev);<br>
>><br>
>> +bool amdgpu_device_cache_pci_state(struct
pci_dev *pdev);<br>
>> +bool amdgpu_device_load_pci_state(struct pci_dev
*pdev);<br>
>> +<br>
>> +<br>
>><br>
>> #include "amdgpu_object.h"<br>
>><br>
>> diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
>> index d9e3994..2c088df 100644<br>
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
>> @@ -1283,7 +1283,7 @@ static void
amdgpu_switcheroo_set_state(struct pci_dev *pdev,<br>
>> dev->switch_power_state =
DRM_SWITCH_POWER_CHANGING;<br>
>><br>
>>
pci_set_power_state(dev->pdev, PCI_D0);<br>
>> - pci_restore_state(dev->pdev);<br>
>> +
amdgpu_device_load_pci_state(dev->pdev);<br>
>> r =
pci_enable_device(dev->pdev);<br>
>> if (r)<br>
>>
DRM_WARN("pci_enable_device failed (%d)\n", r);<br>
>> @@ -1296,7 +1296,7 @@ static void
amdgpu_switcheroo_set_state(struct pci_dev *pdev,<br>
>>
drm_kms_helper_poll_disable(dev);<br>
>> dev->switch_power_state =
DRM_SWITCH_POWER_CHANGING;<br>
>> amdgpu_device_suspend(dev,
true);<br>
>> - pci_save_state(dev->pdev);<br>
>> +
amdgpu_device_cache_pci_state(dev->pdev);<br>
>> /* Shut down the device */<br>
>>
pci_disable_device(dev->pdev);<br>
>>
pci_set_power_state(dev->pdev, PCI_D3cold);<br>
>> @@ -3401,8 +3401,9 @@ int
amdgpu_device_init(struct amdgpu_device *adev,<br>
>> if (r)<br>
>> dev_err(adev->dev,
"amdgpu_pmu_init failed\n");<br>
>><br>
>> - if (pci_save_state(pdev))<br>
>> - DRM_ERROR("Failed to save PCI
state!!\n");<br>
>> + /* Have stored pci confspace at hand for
restore in sudden PCI error */<br>
>> + if
(!amdgpu_device_cache_pci_state(adev->pdev))<br>
>> + DRM_WARN("Failed to cache PCI
state!");<br>
>><br>
>> return 0;<br>
>><br>
>> @@ -3430,6 +3431,8 @@ void
amdgpu_device_fini(struct amdgpu_device *adev)<br>
>>
flush_delayed_work(&adev->delayed_init_work);<br>
>> adev->shutdown = true;<br>
>><br>
>> + kfree(adev->pci_state);<br>
>> +<br>
>> /* make sure IB test finished before
entering exclusive mode<br>
>> * to avoid preemption on IB test<br>
>> * */<br>
>> @@ -4855,7 +4858,7 @@ pci_ers_result_t
amdgpu_pci_slot_reset(struct pci_dev *pdev)<br>
>> /* wait for asic to come out of reset */<br>
>> msleep(500);<br>
>><br>
>> - pci_restore_state(pdev);<br>
>> + amdgpu_device_load_pci_state(pdev);<br>
>><br>
>> /* confirm ASIC came out of reset */<br>
>> for (i = 0; i <
adev->usec_timeout; i++) {<br>
>> @@ -4934,8 +4937,10 @@ pci_ers_result_t
amdgpu_pci_slot_reset(struct pci_dev *pdev)<br>
>><br>
>> out:<br>
>><br>
>> - if (!r)<br>
>> + if (!r) {<br>
>> +
amdgpu_device_cache_pci_state(adev->pdev);<br>
>> DRM_INFO("PCIe error recovery
succeeded\n");<br>
>> + }<br>
>> else {<br>
>> DRM_ERROR("PCIe error recovery
failed, err:%d", r);<br>
>> amdgpu_device_unlock_adev(adev);<br>
>> @@ -4974,3 +4979,46 @@ void
amdgpu_pci_resume(struct pci_dev *pdev)<br>
>><br>
>> amdgpu_device_unlock_adev(adev);<br>
>> }<br>
>> +<br>
>> +bool amdgpu_device_cache_pci_state(struct
pci_dev *pdev)<br>
>> +{<br>
>> + struct drm_device *dev =
pci_get_drvdata(pdev);<br>
>> + struct amdgpu_device *adev =
drm_to_adev(dev);<br>
>> + int r;<br>
>> +<br>
>> + r = pci_save_state(pdev);<br>
>> + if (!r) {<br>
>> + kfree(adev->pci_state);<br>
>> +<br>
>> + adev->pci_state =
pci_store_saved_state(pdev);<br>
>> +<br>
>> + if (!adev->pci_state) {<br>
>> + DRM_ERROR("Failed to
store PCI saved state");<br>
>> + return false;<br>
>> + }<br>
>> + } else {<br>
>> + DRM_WARN("Failed to save PCI
state, err:%d\n", r);<br>
>> + return false;<br>
>> + }<br>
>> +<br>
>> + return true;<br>
>> +}<br>
>> +<br>
>> +bool amdgpu_device_load_pci_state(struct pci_dev
*pdev)<br>
>> +{<br>
>> + struct drm_device *dev =
pci_get_drvdata(pdev);<br>
>> + struct amdgpu_device *adev =
drm_to_adev(dev);<br>
>> + int r;<br>
>> +<br>
>> + if (!adev->pci_state)<br>
>> + return false;<br>
>> +<br>
>> + r = pci_load_saved_state(pdev,
adev->pci_state);<br>
>> +<br>
>> + if (!r) {<br>
>> + pci_restore_state(pdev);<br>
>> + } else {<br>
>> + DRM_WARN("Failed to load PCI
state, err:%d\n", r);<br>
>> + return false;<br>
>> + }<br>
>> +}<br>
>> diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
>> index 4bbcc70..7a6482a 100644<br>
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
>> @@ -1320,7 +1320,7 @@ static int
amdgpu_pmops_runtime_suspend(struct device *dev)<br>
>> if (amdgpu_is_atpx_hybrid()) {<br>
>>
pci_ignore_hotplug(pdev);<br>
>> } else {<br>
>> - pci_save_state(pdev);<br>
>> +
amdgpu_device_cache_pci_state(pdev);<br>
>>
pci_disable_device(pdev);<br>
>>
pci_ignore_hotplug(pdev);<br>
>>
pci_set_power_state(pdev, PCI_D3cold);<br>
>> @@ -1353,7 +1353,7 @@ static int
amdgpu_pmops_runtime_resume(struct device *dev)<br>
>> pci_set_master(pdev);<br>
>> } else {<br>
>>
pci_set_power_state(pdev, PCI_D0);<br>
>> - pci_restore_state(pdev);<br>
>> +
amdgpu_device_load_pci_state(pdev);<br>
>> ret =
pci_enable_device(pdev);<br>
>> if (ret)<br>
>> return ret;<br>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
b/drivers/gpu/drm/amd/amdgpu/nv.c<br>
>> index 4d14023..0ec6603 100644<br>
>> --- a/drivers/gpu/drm/amd/amdgpu/nv.c<br>
>> +++ b/drivers/gpu/drm/amd/amdgpu/nv.c<br>
>> @@ -311,7 +311,7 @@ static int
nv_asic_mode1_reset(struct amdgpu_device *adev)<br>
>> /* disable BM */<br>
>> pci_clear_master(adev->pdev);<br>
>><br>
>> - pci_save_state(adev->pdev);<br>
>> +
amdgpu_device_cache_pci_state(adev->pdev);<br>
>><br>
>> if
(amdgpu_dpm_is_mode1_reset_supported(adev)) {<br>
>> dev_info(adev->dev, "GPU smu
mode1 reset\n");<br>
>> @@ -323,7 +323,7 @@ static int
nv_asic_mode1_reset(struct amdgpu_device *adev)<br>
>><br>
>> if (ret)<br>
>> dev_err(adev->dev, "GPU mode1
reset failed\n");<br>
>> - pci_restore_state(adev->pdev);<br>
>> +
amdgpu_device_load_pci_state(adev->pdev);<br>
>><br>
>> /* wait for asic to come out of reset */<br>
>> for (i = 0; i <
adev->usec_timeout; i++) {<br>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
>> index 2f93c47..ddd55e3 100644<br>
>> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
>> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
>> @@ -484,13 +484,13 @@ static int
soc15_asic_mode1_reset(struct amdgpu_device *adev)<br>
>> /* disable BM */<br>
>> pci_clear_master(adev->pdev);<br>
>><br>
>> - pci_save_state(adev->pdev);<br>
>> +
amdgpu_device_cache_pci_state(adev->pdev);<br>
>><br>
>> ret = psp_gpu_reset(adev);<br>
>> if (ret)<br>
>> dev_err(adev->dev, "GPU mode1
reset failed\n");<br>
>><br>
>> - pci_restore_state(adev->pdev);<br>
>> +
amdgpu_device_load_pci_state(adev->pdev);<br>
>><br>
>> /* wait for asic to come out of reset */<br>
>> for (i = 0; i <
adev->usec_timeout; i++) {<br>
>> --<br>
>> 2.7.4<br>
>><br>
>> _______________________________________________<br>
>> amd-gfx mailing list<br>
>> <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
>> <a
href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Candrey.grodzovsky%40amd.com%7Cf7e5e09330074d176b5b08d84a99236e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637341368926287137&sdata=HTTP5xt%2BFTc%2F%2BlcI37wkRQ0BqTHOXOQVpSlR%2FDEnFlM%3D&reserved=0"
moz-do-not-send="true">
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Candrey.grodzovsky%40amd.com%7Cf7e5e09330074d176b5b08d84a99236e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637341368926287137&sdata=HTTP5xt%2BFTc%2F%2BlcI37wkRQ0BqTHOXOQVpSlR%2FDEnFlM%3D&reserved=0</a><br>
_______________________________________________<br>
amd-gfx mailing list<br>
<a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<a
href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Candrey.grodzovsky%40amd.com%7Cf7e5e09330074d176b5b08d84a99236e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637341368926287137&sdata=HTTP5xt%2BFTc%2F%2BlcI37wkRQ0BqTHOXOQVpSlR%2FDEnFlM%3D&reserved=0"
moz-do-not-send="true">https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Candrey.grodzovsky%40amd.com%7Cf7e5e09330074d176b5b08d84a99236e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637341368926287137&sdata=HTTP5xt%2BFTc%2F%2BlcI37wkRQ0BqTHOXOQVpSlR%2FDEnFlM%3D&reserved=0</a><br>
</div>
</span></font></div>
<br>
<fieldset class="mimeAttachmentHeader"></fieldset>
<pre class="moz-quote-pre" wrap="">_______________________________________________
amd-gfx mailing list
<a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>
<a class="moz-txt-link-freetext" href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a>
</pre>
</blockquote>
<br>
</body>
</html>