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<p class="msipheader251902e5" style="margin:0in"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:#317100">[AMD Public Use]</span><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">+ {<o:p></o:p></p>
<p class="MsoNormal">+ dev_warn(psp->adev->dev, "RAS Init Status: 0x%X\n", ras_cmd->ras_status);<o:p></o:p></p>
<p class="MsoNormal">+ }<o:p></o:p></p>
<p class="MsoNormal">Please remove the redundant bracket. <o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Other than that, the patch is<o:p></o:p></p>
<p class="MsoNormal">Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">In addition, please create another patch to move the nbio ras controller irq source registry to sw_init, which is the consistent as what we did for other ip blocks, register the irq source in IP sw_init funcs.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Regards,<o:p></o:p></p>
<p class="MsoNormal">Hawking<o:p></o:p></p>
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<p class="MsoNormal"><b>From:</b> Clements, John <John.Clements@amd.com> <br>
<b>Sent:</b> Friday, September 11, 2020 12:03<br>
<b>To:</b> amd-gfx list <amd-gfx@lists.freedesktop.org>; Chen, Guchun <Guchun.Chen@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu: Update RAS init handling<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="msipheadera92e061b" style="margin:0in"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:#0078D7">[AMD Official Use Only - Internal Distribution Only]</span><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Added RAS status check and tear down RAS context if RAS init fails<o:p></o:p></p>
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