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[AMD Official Use Only - Internal Distribution Only]<br>
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Acked-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Quan, Evan <Evan.Quan@amd.com><br>
<b>Sent:</b> Tuesday, October 13, 2020 2:45 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Quan, Evan <Evan.Quan@amd.com><br>
<b>Subject:</b> [PATCH] drm/amd/pm: increase mclk switch threshold to 200 us</font>
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<div class="PlainText">To avoid underflow seen on Polaris10 with some 3440x1440<br>
144Hz displays. As the threshold of 190 us cuts too close<br>
to minVBlankTime of 192 us.<br>
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Change-Id: Ieca0dc900f0b5764dc661e397e41e8c277ff13de<br>
Signed-off-by: Evan Quan <evan.quan@amd.com><br>
---<br>
drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c | 2 +-<br>
1 file changed, 1 insertion(+), 1 deletion(-)<br>
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diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c<br>
index 3bf8be4d107b..1e8919b0acdb 100644<br>
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c<br>
@@ -2883,7 +2883,7 @@ static int smu7_vblank_too_short(struct pp_hwmgr *hwmgr,<br>
if (hwmgr->is_kicker)<br>
switch_limit_us = data->is_memory_gddr5 ? 450 : 150;<br>
else<br>
- switch_limit_us = data->is_memory_gddr5 ? 190 : 150;<br>
+ switch_limit_us = data->is_memory_gddr5 ? 200 : 150;<br>
break;<br>
case CHIP_VEGAM:<br>
switch_limit_us = 30;<br>
-- <br>
2.28.0<br>
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