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[AMD Public Use]<br>
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It might be cleaner to just split out vega20 into a separate switch case in that function.</div>
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Alex</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Alex Sierra <alex.sierra@amd.com><br>
<b>Sent:</b> Friday, October 30, 2020 11:06 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Sierra Guiza, Alejandro (Alex) <Alex.Sierra@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu: replace ih ip block for vega20 and arcturus</font>
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<div class="PlainText">[Why]<br>
Vega20 and Arcturus asics use oss 5.0 version.<br>
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[How]<br>
Replace ih ip block by navi10 for vega20 and arcturus.<br>
<br>
Signed-off-by: Alex Sierra <alex.sierra@amd.com><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/soc15.c | 15 +++++++++++----<br>
 1 file changed, 11 insertions(+), 4 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
index f57c5f57efa8..fc5b11752931 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
@@ -62,6 +62,7 @@<br>
 #include "nbio_v7_0.h"<br>
 #include "nbio_v7_4.h"<br>
 #include "vega10_ih.h"<br>
+#include "navi10_ih.h"<br>
 #include "sdma_v4_0.h"<br>
 #include "uvd_v7_0.h"<br>
 #include "vce_v4_0.h"<br>
@@ -734,9 +735,15 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)<br>
                                 else<br>
                                         amdgpu_device_ip_block_add(adev, &psp_v3_1_ip_block);<br>
                         }<br>
-                       amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);<br>
+                       if (adev->asic_type == CHIP_VEGA20)<br>
+                               amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);<br>
+                       else<br>
+                               amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);<br>
                 } else {<br>
-                       amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);<br>
+                       if (adev->asic_type == CHIP_VEGA20)<br>
+                               amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);<br>
+                       else<br>
+                               amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);<br>
                         if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP)) {<br>
                                 if (adev->asic_type == CHIP_VEGA20)<br>
                                         amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);<br>
@@ -787,9 +794,9 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev)<br>
                 if (amdgpu_sriov_vf(adev)) {<br>
                         if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))<br>
                                 amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);<br>
-                       amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);<br>
+                       amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);<br>
                 } else {<br>
-                       amdgpu_device_ip_block_add(adev, &vega10_ih_ip_block);<br>
+                       amdgpu_device_ip_block_add(adev, &navi10_ih_ip_block);<br>
                         if (likely(adev->firmware.load_type == AMDGPU_FW_LOAD_PSP))<br>
                                 amdgpu_device_ip_block_add(adev, &psp_v11_0_ip_block);<br>
                 }<br>
-- <br>
2.17.1<br>
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