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<div class="moz-cite-prefix">Then feel free to stick an Acked-by:
Christian König <a class="moz-txt-link-rfc2396E" href="mailto:christian.koenig@amd.com"><christian.koenig@amd.com></a> to the code and
get it committed.<br>
<br>
Ideally somebody should have it on the TODO list to get rid of
that code.<br>
<br>
Christian.<br>
<br>
Am 04.11.20 um 15:33 schrieb Deucher, Alexander:<br>
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font-size: 12pt; color: rgb(0, 0, 0);">
yeah, ideally. Just need to get support for analog encoders.<br>
</div>
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<br>
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Alex</div>
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font-size: 12pt; color: rgb(0, 0, 0);">
<br>
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<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
face="Calibri, sans-serif" color="#000000"><b>From:</b>
Koenig, Christian <a class="moz-txt-link-rfc2396E" href="mailto:Christian.Koenig@amd.com"><Christian.Koenig@amd.com></a><br>
<b>Sent:</b> Wednesday, November 4, 2020 9:31 AM<br>
<b>To:</b> Deucher, Alexander
<a class="moz-txt-link-rfc2396E" href="mailto:Alexander.Deucher@amd.com"><Alexander.Deucher@amd.com></a>; Sharma, Shashank
<a class="moz-txt-link-rfc2396E" href="mailto:Shashank.Sharma@amd.com"><Shashank.Sharma@amd.com></a>; <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"><amd-gfx@lists.freedesktop.org></a><br>
<b>Cc:</b> Qin, Eddy <a class="moz-txt-link-rfc2396E" href="mailto:Eddy.Qin@amd.com"><Eddy.Qin@amd.com></a><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: clip the ref divider
max value at 100</font>
<div> </div>
</div>
<div>
<div class="x_moz-cite-prefix">In the long term we probably want
to nuke this code anyway and switch to the DC code, don't we?<br>
<br>
Christian.<br>
<br>
Am 04.11.20 um 15:23 schrieb Deucher, Alexander:<br>
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You might want to talk to the DAL team, they may have some
advice. In general, I would say test it as well as you
can. It's probably safe as radeon is still the default
driver for SI parts and generally seems to be working well
there.</div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif;
font-size:12pt; color:rgb(0,0,0)">
<br>
</div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif;
font-size:12pt; color:rgb(0,0,0)">
Alex</div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif;
font-size:12pt; color:rgb(0,0,0)">
<br>
</div>
<hr tabindex="-1" style="display:inline-block; width:98%">
<div id="x_divRplyFwdMsg" dir="ltr"><font
style="font-size:11pt" face="Calibri, sans-serif"
color="#000000"><b>From:</b> Sharma, Shashank
<a class="x_moz-txt-link-rfc2396E"
href="mailto:Shashank.Sharma@amd.com"
moz-do-not-send="true"><Shashank.Sharma@amd.com></a><br>
<b>Sent:</b> Wednesday, November 4, 2020 9:11 AM<br>
<b>To:</b> Deucher, Alexander <a
class="x_moz-txt-link-rfc2396E"
href="mailto:Alexander.Deucher@amd.com"
moz-do-not-send="true">
<Alexander.Deucher@amd.com></a>; Koenig, Christian
<a class="x_moz-txt-link-rfc2396E"
href="mailto:Christian.Koenig@amd.com"
moz-do-not-send="true">
<Christian.Koenig@amd.com></a>; <a
class="x_moz-txt-link-abbreviated"
href="mailto:amd-gfx@lists.freedesktop.org"
moz-do-not-send="true">
amd-gfx@lists.freedesktop.org</a> <a
class="x_moz-txt-link-rfc2396E"
href="mailto:amd-gfx@lists.freedesktop.org"
moz-do-not-send="true">
<amd-gfx@lists.freedesktop.org></a><br>
<b>Cc:</b> Qin, Eddy <a class="x_moz-txt-link-rfc2396E"
href="mailto:Eddy.Qin@amd.com" moz-do-not-send="true">
<Eddy.Qin@amd.com></a><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: clip the ref
divider max value at 100</font>
<div> </div>
</div>
<div>
<p>Thanks Alex, Same question here, <br>
</p>
<p>Should we go through some extensive test routine due to
change in PLL values, or is it OK to go ahead based on our
experience from Radeon values ?
<br>
</p>
<p><br>
</p>
<p>Regards<br>
</p>
<p>Shashank<br>
</p>
<p><br>
</p>
<div class="x_x_moz-cite-prefix">On 04/11/20 7:36 pm,
Deucher, Alexander wrote:<br>
</div>
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<div
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font-size:12pt; color:rgb(0,0,0)">
Acked-by: Alex Deucher <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:alexander.deucher@amd.com"
moz-do-not-send="true">
<alexander.deucher@amd.com></a><br>
</div>
<hr tabindex="-1" style="display:inline-block; width:98%">
<div id="x_x_divRplyFwdMsg" dir="ltr"><font
style="font-size:11pt" face="Calibri, sans-serif"
color="#000000"><b>From:</b> Koenig, Christian
<a class="x_x_moz-txt-link-rfc2396E"
href="mailto:Christian.Koenig@amd.com"
moz-do-not-send="true"><Christian.Koenig@amd.com></a><br>
<b>Sent:</b> Wednesday, November 4, 2020 6:54 AM<br>
<b>To:</b> Sharma, Shashank <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Shashank.Sharma@amd.com"
moz-do-not-send="true">
<Shashank.Sharma@amd.com></a>; <a
class="x_x_moz-txt-link-abbreviated"
href="mailto:amd-gfx@lists.freedesktop.org"
moz-do-not-send="true">
amd-gfx@lists.freedesktop.org</a> <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:amd-gfx@lists.freedesktop.org"
moz-do-not-send="true">
<amd-gfx@lists.freedesktop.org></a><br>
<b>Cc:</b> Deucher, Alexander <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Alexander.Deucher@amd.com"
moz-do-not-send="true">
<Alexander.Deucher@amd.com></a>; Qin, Eddy <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Eddy.Qin@amd.com"
moz-do-not-send="true">
<Eddy.Qin@amd.com></a><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: clip the ref
divider max value at 100</font>
<div> </div>
</div>
<div class="x_x_BodyFragment"><font size="2"><span
style="font-size:11pt">
<div class="x_x_PlainText">Am 04.11.20 um 11:40
schrieb Sharma, Shashank:<br>
> [AMD Public Use]<br>
><br>
> Hello Christian,<br>
> Yes, that 100 is hardcoded in Radeon, and git
blame says it was one of your patches which made
it 100 from 128 😊.<br>
> Would you mind having a look at commit id:
4b21ce1b4b5d262e7d4656b8ececc891fc3cb806 ?<br>
<br>
Ah, yes that one :)<br>
<br>
Yeah the background is that this was just an
educated guess because I <br>
couldn't find anybody which could tell me what the
real limits of the <br>
PLL is.<br>
<br>
Looks like we just forgot to apply that patch to
amdgpu.<br>
<br>
Regards,<br>
Christian.<br>
<br>
><br>
> Regards<br>
> Shashank<br>
> -----Original Message-----<br>
> From: Koenig, Christian <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Christian.Koenig@amd.com"
moz-do-not-send="true">
<Christian.Koenig@amd.com></a><br>
> Sent: Wednesday, November 4, 2020 3:35 PM<br>
> To: Sharma, Shashank <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Shashank.Sharma@amd.com"
moz-do-not-send="true">
<Shashank.Sharma@amd.com></a>; <a
class="x_x_moz-txt-link-abbreviated"
href="mailto:amd-gfx@lists.freedesktop.org"
moz-do-not-send="true">
amd-gfx@lists.freedesktop.org</a><br>
> Cc: Deucher, Alexander <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Alexander.Deucher@amd.com"
moz-do-not-send="true">
<Alexander.Deucher@amd.com></a>; Qin, Eddy
<a class="x_x_moz-txt-link-rfc2396E"
href="mailto:Eddy.Qin@amd.com"
moz-do-not-send="true">
<Eddy.Qin@amd.com></a><br>
> Subject: Re: [PATCH] drm/amdgpu: clip the ref
divider max value at 100<br>
><br>
> Am 03.11.20 um 18:13 schrieb Shashank Sharma:<br>
>> This patch limits the ref_div_max value
to 100, during the calculation<br>
>> of PLL feedback reference divider. With
current value (128), the<br>
>> produced fb_ref_div value generates
unstable output at particular<br>
>> frequencies. Radeon driver limits this
value at 100.<br>
> Mhm, is that 100 hard coded in radeon? I have
no idea where that is coming from.<br>
><br>
> Best would probably to grab a hardware
engineer and try to figure out what the real
maximums for the PLL is to still produce a stable
signal.<br>
><br>
> Christian.<br>
><br>
>> On Oland, when we try to setup mode
2048x1280@60 (a bit weird, I<br>
>> know), it demands a clock of 221270 Khz.
It's been observed that the<br>
>> PLL calculations using values 128 and 100
are vastly different, and<br>
>> look like this:<br>
>><br>
>>
+------------------------------------------+<br>
>> |Parameter |AMDGPU
|Radeon |<br>
>> | |
| |<br>
>>
+-------------+----------------------------+<br>
>> |Clock feedback
| |<br>
>> |divider max | 128 |
100 |<br>
>> |cap value |
| |<br>
>> | |
| |<br>
>> | |
| |<br>
>>
+------------------------------------------+<br>
>> |ref_div_max |
| |<br>
>> | | 42 |
20 |<br>
>> | |
| |<br>
>> | |
| |<br>
>>
+------------------------------------------+<br>
>> |ref_div | 42 |
20 |<br>
>> | |
| |<br>
>>
+------------------------------------------+<br>
>> |fb_div | 10326 |
8195 |<br>
>>
+------------------------------------------+<br>
>> |fb_div | 1024 |
163 |<br>
>>
+------------------------------------------+<br>
>> |fb_dev_p | 4 |
9 |<br>
>> |frac fb_de^_p|
| |<br>
>>
+----------------------------+-------------+<br>
>><br>
>> With ref_div_max value clipped at 100,
AMDGPU driver can also drive<br>
>> videmode 2048x1280@60 (221Mhz) and
produce proper output without any<br>
>> blanking and distortion on the screen.<br>
>><br>
>> PS: This value was changed from 128 to
100 in Radeon driver also, here:<br>
>> <a
href="https://github.com/freedesktop/drm-tip/commit/4b21ce1b4b5d262e7d4656b8"
moz-do-not-send="true">
https://github.com/freedesktop/drm-tip/commit/4b21ce1b4b5d262e7d4656b8</a><br>
>> ececc891fc3cb806<br>
>><br>
>> Cc: Alex Deucher <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Alexander.Deucher@amd.com"
moz-do-not-send="true">
<Alexander.Deucher@amd.com></a><br>
>> Cc: Christian König <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:christian.koenig@amd.com"
moz-do-not-send="true">
<christian.koenig@amd.com></a><br>
>> Cc: Eddy Qin <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:Eddy.Qin@amd.com"
moz-do-not-send="true">
<Eddy.Qin@amd.com></a><br>
>><br>
>> Signed-off-by: Shashank Sharma <a
class="x_x_moz-txt-link-rfc2396E"
href="mailto:shashank.sharma@amd.com"
moz-do-not-send="true">
<shashank.sharma@amd.com></a><br>
>> ---<br>
>>
drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c | 2 +-<br>
>> 1 file changed, 1 insertion(+), 1
deletion(-)<br>
>><br>
>> diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c<br>
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c<br>
>> index 1f2305b7bd13..23a2e1ebf78a 100644<br>
>> ---
a/drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c<br>
>> +++
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pll.c<br>
>> @@ -85,7 +85,7 @@ static void
amdgpu_pll_get_fb_ref_div(unsigned nom, unsigned
den, unsigned post_<br>
>>
unsigned *fb_div, unsigned *ref_div)<br>
>> {<br>
>> /* limit reference * post divider
to a maximum */<br>
>> - ref_div_max = min(128 / post_div,
ref_div_max);<br>
>> + ref_div_max = min(100 / post_div,
ref_div_max);<br>
>> <br>
>> /* get matching reference and
feedback divider */<br>
>> *ref_div =
min(max(DIV_ROUND_CLOSEST(den, post_div), 1u),<br>
>> ref_div_max);<br>
<br>
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<pre class="moz-quote-pre" wrap="">_______________________________________________
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