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<p>Reviewed-by: Leo Liu <a class="moz-txt-link-rfc2396E" href="mailto:leo.liu@amd.com"><leo.liu@amd.com></a></p>
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<div class="moz-cite-prefix">On 2020-11-13 5:33 p.m., Jiang, Sonny
wrote:<br>
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<blockquote type="cite" cite="mid:DM6PR12MB343394680382B27D3128528AFDE60@DM6PR12MB3433.namprd12.prod.outlook.com">
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[AMD Official Use Only - Internal Distribution Only]<br>
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<p style="font-family:Arial;font-size:11pt;color:#0078D7;margin:5pt;" align="Left">
[AMD Official Use Only - Internal Distribution Only]<br>
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<div style="font-family: Calibri, Arial, Helvetica,
sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
Ping.<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b>
Jiang, Sonny <a class="moz-txt-link-rfc2396E" href="mailto:Sonny.Jiang@amd.com"><Sonny.Jiang@amd.com></a><br>
<b>Sent:</b> Monday, November 9, 2020 2:41 PM<br>
<b>To:</b> <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"><amd-gfx@lists.freedesktop.org></a><br>
<b>Cc:</b> Jiang, Sonny <a class="moz-txt-link-rfc2396E" href="mailto:Sonny.Jiang@amd.com"><Sonny.Jiang@amd.com></a><br>
<b>Subject:</b> [PATCH v2] drm/amdgpu: fix SI UVD firmware
validate resume fail</font>
<div> </div>
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<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">The SI UVD firmware validate key
is stored at the end of firmware,<br>
which is changed during resume while playing video. So
get the key<br>
at sw_init and store it for fw validate using.<br>
<br>
Signed-off-by: Sonny Jiang <a class="moz-txt-link-rfc2396E" href="mailto:sonny.jiang@amd.com"><sonny.jiang@amd.com></a><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 +<br>
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 20
+++++++++++---------<br>
2 files changed, 12 insertions(+), 9 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h<br>
index 5eb63288d157..edbb8194ee81 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h<br>
@@ -67,6 +67,7 @@ struct amdgpu_uvd {<br>
unsigned harvest_config;<br>
/* store image width to adjust nb memory
state */<br>
unsigned decode_image_width;<br>
+ uint32_t keyselect;<br>
};<br>
<br>
int amdgpu_uvd_sw_init(struct amdgpu_device *adev);<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c<br>
index 7cf4b11a65c5..3a5dce634cda 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c<br>
@@ -277,15 +277,8 @@ static void
uvd_v3_1_mc_resume(struct amdgpu_device *adev)<br>
*/<br>
static int uvd_v3_1_fw_validate(struct amdgpu_device
*adev)<br>
{<br>
- void *ptr;<br>
- uint32_t ucode_len, i;<br>
- uint32_t keysel;<br>
-<br>
- ptr = adev->uvd.inst[0].cpu_addr;<br>
- ptr += 192 + 16;<br>
- memcpy(&ucode_len, ptr, 4);<br>
- ptr += ucode_len;<br>
- memcpy(&keysel, ptr, 4);<br>
+ int i;<br>
+ uint32_t keysel = adev->uvd.keyselect;<br>
<br>
WREG32(mmUVD_FW_START, keysel);<br>
<br>
@@ -550,6 +543,8 @@ static int uvd_v3_1_sw_init(void
*handle)<br>
struct amdgpu_ring *ring;<br>
struct amdgpu_device *adev = (struct
amdgpu_device *)handle;<br>
int r;<br>
+ void *ptr;<br>
+ uint32_t ucode_len;<br>
<br>
/* UVD TRAP */<br>
r = amdgpu_irq_add_id(adev,
AMDGPU_IRQ_CLIENTID_LEGACY, 124,
&adev->uvd.inst->irq);<br>
@@ -560,6 +555,13 @@ static int uvd_v3_1_sw_init(void
*handle)<br>
if (r)<br>
return r;<br>
<br>
+ /* Retrieval firmware validate key */<br>
+ ptr = adev->uvd.inst[0].cpu_addr;<br>
+ ptr += 192 + 16;<br>
+ memcpy(&ucode_len, ptr, 4);<br>
+ ptr += ucode_len;<br>
+ memcpy(&adev->uvd.keyselect, ptr, 4);<br>
+<br>
ring = &adev->uvd.inst->ring;<br>
sprintf(ring->name, "uvd");<br>
r = amdgpu_ring_init(adev, ring, 512,
&adev->uvd.inst->irq, 0,<br>
-- <br>
2.25.1<br>
<br>
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