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<div class="moz-cite-prefix">Mhm, then I don't know what's going
wrong here.<br>
<br>
Could be that the fence somehow ends up in a BO dependency.<br>
<br>
Pierre do you have some time for testing today? Or could you
provide me some way to test this?<br>
<br>
Christian.<br>
<br>
Am 24.11.20 um 03:48 schrieb Pierre-Loup A. Griffais:<br>
</div>
<blockquote type="cite" cite="mid:8c9a2e5d-fbfc-45b9-f0de-92e292fcb7e7@valvesoftware.com">
<p>I just built my kernel with it and tested Horizon Zero Dawn on
stock Proton 5.13, and it doesn't seem to change things there.</p>
<p>This pattern looks identical as with before the kernel patch,
as far as I can tell:</p>
<p><a class="moz-txt-link-freetext" href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fimgur.com%2Fa%2F1fZWgNG&data=04%7C01%7Cchristian.koenig%40amd.com%7C4b90eb41edd04592bd4f08d89023653b%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637417828990103282%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=9GgRTJGEvsilDAKk%2BAmMsOYtkaV6KDQvW%2B%2ByZ%2BjNoVk%3D&reserved=0" originalsrc="https://imgur.com/a/1fZWgNG" shash="fjxcl2lQPlDhPxkxjqbnhCKpKxeIFE3SWb6jZu+GyS6Z+iqx9FCHR+axtP4fvW+QSKrpK4+sLhPZs1HlyV/sudPTOi4vS9KRgbJLorAgWuRBD78Mp1mDD0M9SKn9d2UVTrNFjJfJJP0VYVd24KKYUmqbuCf2Aoeao9jVwx+Es3I=" moz-do-not-send="true">https://imgur.com/a/1fZWgNG</a></p>
<p>The last purple block is a piece of GPU work on the gfx ring.
It's been queued by software 0.7ms ago, but doesn't get put on
the HW ring until right after the previous piece of GPU work
completes. The orange chunk below is the 'gfx' kernel task
executing, to queue it.</p>
<p>Thanks,</p>
<p> - Pierre-Loup<br>
</p>
On 2020-11-23 18:09, Marek Olšák wrote:<br>
<blockquote type="cite" cite="mid:CAAxE2A4MThFV0Whms5QGHmXNhhw-9++naxWV0n=HqinJAOupSw@mail.gmail.com">
<div dir="ltr">
<div>Pierre-Loup, does this do what you requested?</div>
<div><br>
</div>
<div>Thanks,</div>
<div>Marek<br>
</div>
</div>
<br>
<div class="gmail_quote">
<div dir="ltr" class="gmail_attr">On Mon, Nov 23, 2020 at 3:17
PM Christian König <<a href="mailto:ckoenig.leichtzumerken@gmail.com" moz-do-not-send="true">ckoenig.leichtzumerken@gmail.com</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px 0px
0.8ex;border-left:1px solid
rgb(204,204,204);padding-left:1ex">
<div>
<div>That the CPU round trip is gone now.<br>
<br>
Christian.<br>
<br>
Am 23.11.20 um 20:49 schrieb Marek Olšák:<br>
</div>
<blockquote type="cite">
<div dir="ltr">
<div>What is the behavior we should expect?</div>
<div><br>
</div>
<div>Marek<br>
</div>
</div>
<br>
<div class="gmail_quote">
<div dir="ltr" class="gmail_attr">On Mon, Nov 23, 2020
at 7:31 AM Christian König <<a href="mailto:ckoenig.leichtzumerken@gmail.com" target="_blank" moz-do-not-send="true">ckoenig.leichtzumerken@gmail.com</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px
0px 0.8ex;border-left:1px solid
rgb(204,204,204);padding-left:1ex">Ping,
Pierre/Marek does this change works as expected?<br>
<br>
Regards,<br>
Christian.<br>
<br>
Am 18.11.20 um 14:20 schrieb Christian König:<br>
> This allows for optimizing the CPU round trip
away.<br>
><br>
> Signed-off-by: Christian König <<a href="mailto:christian.koenig@amd.com" target="_blank" moz-do-not-send="true">christian.koenig@amd.com</a>><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2
+-<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c | 27
++++++++++++++++++++++++<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h | 1
+<br>
> 3 files changed, 29 insertions(+), 1
deletion(-)<br>
><br>
> diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c<br>
> index 79342976fa76..68f9a4adf5d2 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c<br>
> @@ -1014,7 +1014,7 @@ static int
amdgpu_syncobj_lookup_and_add_to_sync(struct
amdgpu_cs_parser *p,<br>
> return r;<br>
> }<br>
> <br>
> - r =
amdgpu_sync_fence(&p->job->sync, fence);<br>
> + r =
amdgpu_sync_fence_chain(&p->job->sync,
fence);<br>
> dma_fence_put(fence);<br>
> <br>
> return r;<br>
> diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c<br>
> index 8ea6c49529e7..d0d64af06f54 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.c<br>
> @@ -28,6 +28,8 @@<br>
> * Christian König <<a href="mailto:christian.koenig@amd.com" target="_blank" moz-do-not-send="true">christian.koenig@amd.com</a>><br>
> */<br>
> <br>
> +#include <linux/dma-fence-chain.h><br>
> +<br>
> #include "amdgpu.h"<br>
> #include "amdgpu_trace.h"<br>
> #include "amdgpu_amdkfd.h"<br>
> @@ -169,6 +171,31 @@ int
amdgpu_sync_fence(struct amdgpu_sync *sync, struct
dma_fence *f)<br>
> return 0;<br>
> }<br>
> <br>
> +/**<br>
> + * amdgpu_sync_fence_chain - unpack
dma_fence_chain and sync<br>
> + *<br>
> + * @sync: sync object to add fence to<br>
> + * @f: potential dma_fence_chain to sync to.<br>
> + *<br>
> + * Add the fences inside the chain to the sync
object.<br>
> + */<br>
> +int amdgpu_sync_fence_chain(struct amdgpu_sync
*sync, struct dma_fence *f)<br>
> +{<br>
> + int r;<br>
> +<br>
> + dma_fence_chain_for_each(f, f) {<br>
> + if (dma_fence_is_signaled(f))<br>
> + continue;<br>
> +<br>
> + r = amdgpu_sync_fence(sync, f);<br>
> + if (r) {<br>
> + dma_fence_put(f);<br>
> + return r;<br>
> + }<br>
> + }<br>
> + return 0;<br>
> +}<br>
> +<br>
> /**<br>
> * amdgpu_sync_vm_fence - remember to sync to
this VM fence<br>
> *<br>
> diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h<br>
> index 7c0fe20c470d..b142175b65b6 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sync.h<br>
> @@ -48,6 +48,7 @@ struct amdgpu_sync {<br>
> <br>
> void amdgpu_sync_create(struct amdgpu_sync
*sync);<br>
> int amdgpu_sync_fence(struct amdgpu_sync
*sync, struct dma_fence *f);<br>
> +int amdgpu_sync_fence_chain(struct amdgpu_sync
*sync, struct dma_fence *f);<br>
> int amdgpu_sync_vm_fence(struct amdgpu_sync
*sync, struct dma_fence *fence);<br>
> int amdgpu_sync_resv(struct amdgpu_device
*adev, struct amdgpu_sync *sync,<br>
> struct dma_resv *resv, enum
amdgpu_sync_mode mode,<br>
<br>
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