<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style>
</head>
<body dir="ltr">
<p style="font-family:Arial;font-size:11pt;color:#0078D7;margin:5pt;" align="Left">
[AMD Official Use Only - Internal Distribution Only]<br>
</p>
<br>
<div>
<div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
Reviewed-by: Kevin Wang <kevin1.wang@amd.com></div>
<div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
<br>
Best Regards,<br>
Kevin</div>
<hr tabindex="-1" style="display:inline-block; width:98%">
<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Stanley.Yang <Stanley.Yang@amd.com><br>
<b>Sent:</b> Monday, December 14, 2020 6:35 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Jian, Jane <Jane.Jian@amd.com><br>
<b>Cc:</b> Yang, Stanley <Stanley.Yang@amd.com><br>
<b>Subject:</b> [PATCH V2 1/1] drm/amdgpu: skip load smu and sdma microcode on sriov for SIENNA_CICHLID</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span style="font-size:11pt">
<div class="PlainText">skip load smu and sdma fw on sriov due to sos,<br>
ta and asd fw have been skipped for SIENNA_CICHLID.<br>
<br>
V2:<br>
    move asic check into smu11<br>
<br>
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c         |  3 +++<br>
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c      | 10 ++++------<br>
 drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c |  5 +++++<br>
 3 files changed, 12 insertions(+), 6 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
index 39e17aae655f..87566dee048d 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
@@ -153,6 +153,9 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev)<br>
         struct amdgpu_firmware_info *info = NULL;<br>
         const struct common_firmware_header *header = NULL;<br>
 <br>
+       if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_SIENNA_CICHLID))<br>
+               return 0;<br>
+<br>
         DRM_DEBUG("\n");<br>
 <br>
         switch (adev->asic_type) {<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
index cf999b7a2164..8b867a6d52b5 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
@@ -847,12 +847,10 @@ static int smu_sw_init(void *handle)<br>
         smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO;<br>
         smu->smu_dpm.requested_dpm_level = AMD_DPM_FORCED_LEVEL_AUTO;<br>
 <br>
-       if (!amdgpu_sriov_vf(adev) || (adev->asic_type != CHIP_NAVI12)) {<br>
-               ret = smu_init_microcode(smu);<br>
-               if (ret) {<br>
-                       dev_err(adev->dev, "Failed to load smu firmware!\n");<br>
-                       return ret;<br>
-               }<br>
+       ret = smu_init_microcode(smu);<br>
+       if (ret) {<br>
+               dev_err(adev->dev, "Failed to load smu firmware!\n");<br>
+               return ret;<br>
         }<br>
 <br>
         ret = smu_smc_table_sw_init(smu);<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c<br>
index 624065d3c079..c3c181975c9d 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c<br>
@@ -91,6 +91,11 @@ int smu_v11_0_init_microcode(struct smu_context *smu)<br>
         const struct common_firmware_header *header;<br>
         struct amdgpu_firmware_info *ucode = NULL;<br>
 <br>
+       if (amdgpu_sriov_vf(adev) &&<br>
+                       ((adev->asic_type == CHIP_NAVI12) ||<br>
+                        (adev->asic_type == CHIP_SIENNA_CICHLID)))<br>
+               return 0;<br>
+<br>
         switch (adev->asic_type) {<br>
         case CHIP_ARCTURUS:<br>
                 chip_name = "arcturus";<br>
-- <br>
2.17.1<br>
<br>
_______________________________________________<br>
amd-gfx mailing list<br>
amd-gfx@lists.freedesktop.org<br>
<a href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CKevin1.Wang%40amd.com%7C170ed7c1105e4f1e9ff208d8a01bf99f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637435389321705051%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=iHvrmGlSeLBXPzu54Zc4KjV8Y8gUmtNtmScKLdMhUO8%3D&amp;reserved=0">https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&amp;data=04%7C01%7CKevin1.Wang%40amd.com%7C170ed7c1105e4f1e9ff208d8a01bf99f%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637435389321705051%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=iHvrmGlSeLBXPzu54Zc4KjV8Y8gUmtNtmScKLdMhUO8%3D&amp;reserved=0</a><br>
</div>
</span></font></div>
</div>
</body>
</html>