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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Darren Powell <darren.powell@amd.com><br>
<b>Sent:</b> Saturday, December 19, 2020 8:48 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Powell, Darren <Darren.Powell@amd.com><br>
<b>Subject:</b> [PATCH 4/8] amdgpu/pm: Powerplay API for smu , changed 9 pm power functions to use API</font>
<div> </div>
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<div class="BodyFragment"><font size="2"><span style="font-size:11pt">
<div class="PlainText">Modified Files<br>
  smu_get_power_limit()         - modifed arg0 to match Powerplay API get_power_limit<br>
  smu_set_power_limit()         - modifed arg0 to match Powerplay API set_power_limit<br>
  smu_sys_get_pp_table()        - modifed signature to match Powerplay API get_pp_table<br>
  smu_get_power_num_states()    - modifed arg0 to match Powerplay API get_pp_num_states<br>
  smu_get_current_power_state() - modifed arg0 to match Powerplay API get_current_power_state<br>
  smu_sys_get_pp_feature_mask() - modifed signature to match Powerplay API get_ppfeature_status<br>
  smu_sys_set_pp_feature_mask() - modifed arg0 to match Powerplay API set_ppfeature_status<br>
<br>
Other Changes<br>
  added 7 above smu Powerplay functions to swsmu_dpm_funcs<br>
  removed special smu handling of above functions and called through Powerplay API<br>
<br>
Signed-off-by: Darren Powell <darren.powell@amd.com><br>
---<br>
 drivers/gpu/drm/amd/pm/amdgpu_pm.c        | 73 ++++++++---------------<br>
 drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h   | 16 +++--<br>
 drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 59 +++++++++++-------<br>
 3 files changed, 69 insertions(+), 79 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c<br>
index b345c29147b9..41da5870af58 100644<br>
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c<br>
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c<br>
@@ -124,6 +124,7 @@ static ssize_t amdgpu_get_power_dpm_state(struct device *dev,<br>
 {<br>
         struct drm_device *ddev = dev_get_drvdata(dev);<br>
         struct amdgpu_device *adev = drm_to_adev(ddev);<br>
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;<br>
         enum amd_pm_state_type pm;<br>
         int ret;<br>
 <br>
@@ -136,12 +137,7 @@ static ssize_t amdgpu_get_power_dpm_state(struct device *dev,<br>
                 return ret;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev)) {<br>
-               if (adev->smu.ppt_funcs->get_current_power_state)<br>
-                       pm = smu_get_current_power_state(&adev->smu);<br>
-               else<br>
-                       pm = adev->pm.dpm.user_state;<br>
-       } else if (adev->powerplay.pp_funcs->get_current_power_state) {<br>
+       if (pp_funcs->get_current_power_state) {<br>
                 pm = amdgpu_dpm_get_current_power_state(adev);<br>
         } else {<br>
                 pm = adev->pm.dpm.user_state;<br>
@@ -307,6 +303,7 @@ static ssize_t amdgpu_set_power_dpm_force_performance_level(struct device *dev,<br>
 {<br>
         struct drm_device *ddev = dev_get_drvdata(dev);<br>
         struct amdgpu_device *adev = drm_to_adev(ddev);<br>
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;<br>
         enum amd_dpm_forced_level level;<br>
         enum amd_dpm_forced_level current_level = 0xff;<br>
         int ret = 0;<br>
@@ -342,9 +339,7 @@ static ssize_t amdgpu_set_power_dpm_force_performance_level(struct device *dev,<br>
                 return ret;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev))<br>
-               current_level = smu_get_performance_level(&adev->smu);<br>
-       else if (adev->powerplay.pp_funcs->get_performance_level)<br>
+       if (pp_funcs->get_performance_level)<br>
                 current_level = amdgpu_dpm_get_performance_level(adev);<br>
 <br>
         if (current_level == level) {<br>
@@ -381,7 +376,7 @@ static ssize_t amdgpu_set_power_dpm_force_performance_level(struct device *dev,<br>
                         pm_runtime_put_autosuspend(ddev->dev);<br>
                         return -EINVAL;<br>
                 }<br>
-       } else if (adev->powerplay.pp_funcs->force_performance_level) {<br>
+       } else if (pp_funcs->force_performance_level) {<br>
                 mutex_lock(&adev->pm.mutex);<br>
                 if (adev->pm.dpm.thermal_active) {<br>
                         mutex_unlock(&adev->pm.mutex);<br>
@@ -412,6 +407,7 @@ static ssize_t amdgpu_get_pp_num_states(struct device *dev,<br>
 {<br>
         struct drm_device *ddev = dev_get_drvdata(dev);<br>
         struct amdgpu_device *adev = drm_to_adev(ddev);<br>
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;<br>
         struct pp_states_info data;<br>
         int i, buf_len, ret;<br>
 <br>
@@ -424,12 +420,10 @@ static ssize_t amdgpu_get_pp_num_states(struct device *dev,<br>
                 return ret;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev)) {<br>
-               ret = smu_get_power_num_states(&adev->smu, &data);<br>
-               if (ret)<br>
+       if (pp_funcs->get_pp_num_states) {<br>
+               ret = amdgpu_dpm_get_pp_num_states(adev, &data);<br>
+               if (is_support_sw_smu(adev) && ret)<br>
                         return ret;<br>
-       } else if (adev->powerplay.pp_funcs->get_pp_num_states) {<br>
-               amdgpu_dpm_get_pp_num_states(adev, &data);<br>
         } else {<br>
                 memset(&data, 0, sizeof(data));<br>
         }<br>
@@ -454,8 +448,8 @@ static ssize_t amdgpu_get_pp_cur_state(struct device *dev,<br>
 {<br>
         struct drm_device *ddev = dev_get_drvdata(dev);<br>
         struct amdgpu_device *adev = drm_to_adev(ddev);<br>
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;<br>
         struct pp_states_info data;<br>
-       struct smu_context *smu = &adev->smu;<br>
         enum amd_pm_state_type pm = 0;<br>
         int i = 0, ret = 0;<br>
 <br>
@@ -468,15 +462,13 @@ static ssize_t amdgpu_get_pp_cur_state(struct device *dev,<br>
                 return ret;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev)) {<br>
-               pm = smu_get_current_power_state(smu);<br>
-               ret = smu_get_power_num_states(smu, &data);<br>
-               if (ret)<br>
-                       return ret;<br>
-       } else if (adev->powerplay.pp_funcs->get_current_power_state<br>
-                && adev->powerplay.pp_funcs->get_pp_num_states) {<br>
+       if (pp_funcs->get_current_power_state<br>
+                && pp_funcs->get_pp_num_states) {<br>
                 pm = amdgpu_dpm_get_current_power_state(adev);<br>
-               amdgpu_dpm_get_pp_num_states(adev, &data);<br>
+               ret = amdgpu_dpm_get_pp_num_states(adev, &data);<br>
+<br>
+               if (is_support_sw_smu(adev) && ret)<br>
+                       return ret;</div>
<div class="PlainText">[kevin]:</div>
<div class="PlainText">why we need this workaround for swsmu ?</div>
<div class="PlainText">after using amd_pm_funcs as a proxy, these judgments should not be required.</div>
<div class="PlainText">otherwise, can you help me understand it , thanks.</div>
<div class="PlainText">         }<br>
 <br>
         pm_runtime_mark_last_busy(ddev->dev);<br>
@@ -589,13 +581,7 @@ static ssize_t amdgpu_get_pp_table(struct device *dev,<br>
                 return ret;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev)) {<br>
-               size = smu_sys_get_pp_table(&adev->smu, (void **)&table);<br>
-               pm_runtime_mark_last_busy(ddev->dev);<br>
-               pm_runtime_put_autosuspend(ddev->dev);<br>
-               if (size < 0)<br>
-                       return size;<br>
-       } else if (adev->powerplay.pp_funcs->get_pp_table) {<br>
+       if (adev->powerplay.pp_funcs->get_pp_table) {<br>
                 size = amdgpu_dpm_get_pp_table(adev, &table);<br>
                 pm_runtime_mark_last_busy(ddev->dev);<br>
                 pm_runtime_put_autosuspend(ddev->dev);<br>
@@ -989,9 +975,7 @@ static ssize_t amdgpu_get_pp_features(struct device *dev,<br>
                 return ret;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev))<br>
-               size = smu_sys_get_pp_feature_mask(&adev->smu, buf);<br>
-       else if (adev->powerplay.pp_funcs->get_ppfeature_status)<br>
+       if (adev->powerplay.pp_funcs->get_ppfeature_status)<br>
                 size = amdgpu_dpm_get_ppfeature_status(adev, buf);<br>
         else<br>
                 size = snprintf(buf, PAGE_SIZE, "\n");<br>
@@ -2862,6 +2846,7 @@ static ssize_t amdgpu_hwmon_show_power_cap_max(struct device *dev,<br>
                                          char *buf)<br>
 {<br>
         struct amdgpu_device *adev = dev_get_drvdata(dev);<br>
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;<br>
         uint32_t limit = 0;<br>
         ssize_t size;<br>
         int r;<br>
@@ -2875,10 +2860,7 @@ static ssize_t amdgpu_hwmon_show_power_cap_max(struct device *dev,<br>
                 return r;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev)) {<br>
-               smu_get_power_limit(&adev->smu, &limit, true);<br>
-               size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);<br>
-       } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) {<br>
+       if (pp_funcs && pp_funcs->get_power_limit) {<br>
                 adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, true);<br>
                 size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);<br>
         } else {<br>
@@ -2896,6 +2878,7 @@ static ssize_t amdgpu_hwmon_show_power_cap(struct device *dev,<br>
                                          char *buf)<br>
 {<br>
         struct amdgpu_device *adev = dev_get_drvdata(dev);<br>
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;<br>
         uint32_t limit = 0;<br>
         ssize_t size;<br>
         int r;<br>
@@ -2909,11 +2892,8 @@ static ssize_t amdgpu_hwmon_show_power_cap(struct device *dev,<br>
                 return r;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev)) {<br>
-               smu_get_power_limit(&adev->smu, &limit, false);<br>
-               size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);<br>
-       } else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->get_power_limit) {<br>
-               adev->powerplay.pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, false);<br>
+       if (pp_funcs && pp_funcs->get_power_limit) {<br>
+               pp_funcs->get_power_limit(adev->powerplay.pp_handle, &limit, false);<br>
                 size = snprintf(buf, PAGE_SIZE, "%u\n", limit * 1000000);<br>
         } else {<br>
                 size = snprintf(buf, PAGE_SIZE, "\n");<br>
@@ -2932,6 +2912,7 @@ static ssize_t amdgpu_hwmon_set_power_cap(struct device *dev,<br>
                 size_t count)<br>
 {<br>
         struct amdgpu_device *adev = dev_get_drvdata(dev);<br>
+       const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;<br>
         int err;<br>
         u32 value;<br>
 <br>
@@ -2954,10 +2935,8 @@ static ssize_t amdgpu_hwmon_set_power_cap(struct device *dev,<br>
                 return err;<br>
         }<br>
 <br>
-       if (is_support_sw_smu(adev))<br>
-               err = smu_set_power_limit(&adev->smu, value);<br>
-       else if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->set_power_limit)<br>
-               err = adev->powerplay.pp_funcs->set_power_limit(adev->powerplay.pp_handle, value);<br>
+       if (pp_funcs && pp_funcs->set_power_limit)<br>
+               err = pp_funcs->set_power_limit(adev->powerplay.pp_handle, value);<br>
         else<br>
                 err = -EINVAL;<br>
 <br>
diff --git a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h<br>
index 9f739d1b18d5..8471b42587d3 100644<br>
--- a/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h<br>
+++ b/drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h<br>
@@ -659,11 +659,9 @@ int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);<br>
 <br>
 int smu_set_fan_speed_rpm(void *handle, uint32_t speed);<br>
 <br>
-int smu_get_power_limit(struct smu_context *smu,<br>
-                       uint32_t *limit,<br>
-                       bool max_setting);<br>
+int smu_get_power_limit(void *handle, uint32_t *limit, bool max_setting);<br>
 <br>
-int smu_set_power_limit(struct smu_context *smu, uint32_t limit);<br>
+int smu_set_power_limit(void *handle, uint32_t limit);<br>
 int smu_print_clk_levels(struct smu_context *smu, enum smu_clk_type clk_type, char *buf);<br>
 <br>
 int smu_od_edit_dpm_table(struct smu_context *smu,<br>
@@ -718,10 +716,10 @@ extern const struct amdgpu_ip_block_version smu_v12_0_ip_block;<br>
 <br>
 bool is_support_sw_smu(struct amdgpu_device *adev);<br>
 int smu_reset(struct smu_context *smu);<br>
-int smu_sys_get_pp_table(struct smu_context *smu, void **table);<br>
+int smu_sys_get_pp_table(void *handle, char **table);<br>
 int smu_sys_set_pp_table(struct smu_context *smu,  void *buf, size_t size);<br>
-int smu_get_power_num_states(struct smu_context *smu, struct pp_states_info *state_info);<br>
-enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu);<br>
+int smu_get_power_num_states(void *handle, struct pp_states_info *state_info);<br>
+enum amd_pm_state_type smu_get_current_power_state(void *handle);<br>
 int smu_write_watermarks_table(struct smu_context *smu);<br>
 int smu_set_watermarks_for_clock_ranges(<br>
                 struct smu_context *smu,<br>
@@ -747,8 +745,8 @@ enum amd_dpm_forced_level smu_get_performance_level(void *handle);<br>
 int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level);<br>
 int smu_set_display_count(struct smu_context *smu, uint32_t count);<br>
 int smu_set_ac_dc(struct smu_context *smu);<br>
-size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf);<br>
-int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask);<br>
+int smu_sys_get_pp_feature_mask(void *handle, char *buf);<br>
+int smu_sys_set_pp_feature_mask(void *handle, uint64_t new_mask);<br>
 int smu_force_clk_levels(struct smu_context *smu,<br>
                          enum smu_clk_type clk_type,<br>
                          uint32_t mask);<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
index acde0e831bb8..caed6a10ccd4 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
@@ -48,9 +48,10 @@<br>
 <br>
 static const struct amd_pm_funcs swsmu_dpm_funcs;<br>
 <br>
-size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf)<br>
+int smu_sys_get_pp_feature_mask(void *handle, char *buf)<br>
 {<br>
-       size_t size = 0;<br>
+       struct smu_context *smu = handle;<br>
+       int size = 0;<br>
 <br>
         if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)<br>
                 return -EOPNOTSUPP;<br>
@@ -64,8 +65,9 @@ size_t smu_sys_get_pp_feature_mask(struct smu_context *smu, char *buf)<br>
         return size;<br>
 }<br>
 <br>
-int smu_sys_set_pp_feature_mask(struct smu_context *smu, uint64_t new_mask)<br>
+int smu_sys_set_pp_feature_mask(void *handle, uint64_t new_mask)<br>
 {<br>
+       struct smu_context *smu = handle;<br>
         int ret = 0;<br>
 <br>
         if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)<br>
@@ -268,7 +270,7 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type,<br>
         return ret;<br>
 }<br>
 <br>
-int smu_get_power_num_states(struct smu_context *smu,<br>
+int smu_get_power_num_states(void *handle,<br>
                              struct pp_states_info *state_info)<br>
 {<br>
         if (!state_info)<br>
@@ -290,8 +292,9 @@ bool is_support_sw_smu(struct amdgpu_device *adev)<br>
         return false;<br>
 }<br>
 <br>
-int smu_sys_get_pp_table(struct smu_context *smu, void **table)<br>
+int smu_sys_get_pp_table(void *handle, char **table)<br>
 {<br>
+       struct smu_context *smu = handle;<br>
         struct smu_table_context *smu_table = &smu->smu_table;<br>
         uint32_t powerplay_table_size;<br>
 <br>
@@ -1914,10 +1917,9 @@ int smu_set_fan_speed_rpm(void *handle, uint32_t speed)<br>
         return ret;<br>
 }<br>
 <br>
-int smu_get_power_limit(struct smu_context *smu,<br>
-                       uint32_t *limit,<br>
-                       bool max_setting)<br>
+int smu_get_power_limit(void *handle, uint32_t *limit, bool max_setting)<br>
 {<br>
+       struct smu_context *smu = handle;<br>
         if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)<br>
                 return -EOPNOTSUPP;<br>
 <br>
@@ -1930,8 +1932,9 @@ int smu_get_power_limit(struct smu_context *smu,<br>
         return 0;<br>
 }<br>
 <br>
-int smu_set_power_limit(struct smu_context *smu, uint32_t limit)<br>
+int smu_set_power_limit(void *handle, uint32_t limit)<br>
 {<br>
+       struct smu_context *smu = handle;<br>
         int ret = 0;<br>
 <br>
         if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)<br>
@@ -2482,8 +2485,9 @@ int smu_get_uclk_dpm_states(struct smu_context *smu,<br>
         return ret;<br>
 }<br>
 <br>
-enum amd_pm_state_type smu_get_current_power_state(struct smu_context *smu)<br>
+enum amd_pm_state_type smu_get_current_power_state(void *handle)<br>
 {<br>
+       struct smu_context *smu = handle;<br>
         enum amd_pm_state_type pm_state = POWER_STATE_TYPE_DEFAULT;<br>
 <br>
         if (!smu->pm_enabled || !smu->adev->pm.dpm_enabled)<br>
@@ -2569,19 +2573,28 @@ int smu_gfx_state_change_set(struct smu_context *smu, uint32_t state)<br>
 <br>
 static const struct amd_pm_funcs swsmu_dpm_funcs = {<br>
         /* export for sysfs */<br>
-       .set_fan_control_mode  = smu_set_fan_control_mode,<br>
-       .get_fan_control_mode  = smu_get_fan_control_mode,<br>
-       .set_fan_speed_percent = smu_set_fan_speed_percent,<br>
-       .get_fan_speed_percent = smu_get_fan_speed_percent,<br>
-       .get_performance_level = smu_get_performance_level,<br>
-       .get_fan_speed_rpm     = smu_get_fan_speed_rpm,<br>
-       .set_fan_speed_rpm     = smu_set_fan_speed_rpm,<br>
-       .switch_power_profile  = smu_switch_power_profile,<br>
+       .set_fan_control_mode    = smu_set_fan_control_mode,<br>
+       .get_fan_control_mode    = smu_get_fan_control_mode,<br>
+       .set_fan_speed_percent   = smu_set_fan_speed_percent,<br>
+       .get_fan_speed_percent   = smu_get_fan_speed_percent,<br>
+       .get_performance_level   = smu_get_performance_level,<br>
+       .get_current_power_state = smu_get_current_power_state,<br>
+       .get_fan_speed_rpm       = smu_get_fan_speed_rpm,<br>
+       .set_fan_speed_rpm       = smu_set_fan_speed_rpm,<br>
+       .get_pp_num_states       = smu_get_power_num_states,<br>
+       .get_pp_table            = smu_sys_get_pp_table,<br>
+       .switch_power_profile    = smu_switch_power_profile,<br>
         /* export to amdgpu */<br>
-       .set_mp1_state         = smu_set_mp1_state,<br>
+       .set_power_limit         = smu_set_power_limit,<br>
+       .get_power_limit         = smu_get_power_limit,<br>
+       .set_mp1_state           = smu_set_mp1_state,<br>
         /* export to DC */<br>
-       .enable_mgpu_fan_boost = smu_enable_mgpu_fan_boost,<br>
-       .asic_reset_mode_2     = smu_mode2_reset,<br>
-       .set_df_cstate         = smu_set_df_cstate,<br>
-       .set_xgmi_pstate       = smu_set_xgmi_pstate,<br>
+       .enable_mgpu_fan_boost   = smu_enable_mgpu_fan_boost,<br>
+       .get_ppfeature_status    = smu_sys_get_pp_feature_mask,<br>
+       .set_ppfeature_status    = smu_sys_set_pp_feature_mask,<br>
+       .asic_reset_mode_2       = smu_mode2_reset,<br>
+       .set_df_cstate           = smu_set_df_cstate,<br>
+       .set_xgmi_pstate         = smu_set_xgmi_pstate,<br>
+<br>
+</div>
<div class="PlainText">[kevin]:</div>
<div class="PlainText">the blank line is not neccessary,</div>
<div class="PlainText">please use "checkpatch.pl' to check coding style problems before patch review.</div>
<div class="PlainText"> };<br>
-- <br>
2.25.1<br>
<br>
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