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[AMD Public Use]<br>
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Thanks for the fix.<br>
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Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com></div>
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Thanks,<br>
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Bhawan<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Yu, Lang <Lang.Yu@amd.com><br>
<b>Sent:</b> January 22, 2021 7:35 AM<br>
<b>To:</b> Chen, Guchun <Guchun.Chen@amd.com>; Huang, Ray <Ray.Huang@amd.com><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> RE: [PATCH] drm/amd/display: 64-bit division on 32-bit arch issue</font>
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<div class="PlainText">[AMD Public Use]<br>
<br>
<br>
The header <linux/math64.h> has been included by dm_services.h. The following is the sequence,<br>
<br>
dm_services.h -> dm_services_types.h ->  os_types.h  ->  drm/drm_print.h -> <br>
linux/device.h -> linux/pm.h -> linux/timer.h ->  linux/time.h -> linux/jiffies.h -> linux/math64.h<br>
<br>
<br>
Regards,<br>
Lang <br>
<br>
-----Original Message-----<br>
From: Chen, Guchun <Guchun.Chen@amd.com> <br>
Sent: Friday, January 22, 2021 5:32 PM<br>
To: Huang, Ray <Ray.Huang@amd.com>; Yu, Lang <Lang.Yu@amd.com><br>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>; amd-gfx@lists.freedesktop.org<br>
Subject: RE: [PATCH] drm/amd/display: 64-bit division on 32-bit arch issue<br>
<br>
[AMD Public Use]<br>
<br>
Maybe it’s good to modify subject to " drm/amd/display: fix 64-bit division issue on 32-bit OS"<br>
<br>
And if header <linux/math64.h> should be included?<br>
<br>
Regards,<br>
Guchun<br>
<br>
-----Original Message-----<br>
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Huang Rui<br>
Sent: Friday, January 22, 2021 5:04 PM<br>
To: Yu, Lang <Lang.Yu@amd.com><br>
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@amd.com>; amd-gfx@lists.freedesktop.org<br>
Subject: Re: [PATCH] drm/amd/display: 64-bit division on 32-bit arch issue<br>
<br>
On Fri, Jan 22, 2021 at 05:00:59PM +0800, Yu, Lang wrote:<br>
> Replace "/" with div_u64 for 32-bit arch. On 32-bit arch, the use of <br>
> "/" for 64-bit division will cause build error, i.e.<br>
> "__udivdi3/__divdi3 undefined!".<br>
> <br>
> Fixes: 27755cdf83f1<br>
> drm/amd/display: Update dcn30_apply_idle_power_optimizations() code<br>
> <br>
> Signed-off-by: Lang Yu <Lang.Yu@amd.com><br>
<br>
Acked-by: Huang Rui <ray.huang@amd.com><br>
<br>
> ---<br>
>  drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 12 ++++++------<br>
>  1 file changed, 6 insertions(+), 6 deletions(-)<br>
> <br>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c<br>
> b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c<br>
> index dff83c6a142a..9620fb8a27dc 100644<br>
> --- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c<br>
> +++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c<br>
> @@ -772,8 +772,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)<br>
>                                                        cursor_cache_enable ? &cursor_attr : NULL)) {<br>
>                                unsigned int v_total = stream->adjust.v_total_max ?<br>
>                                                stream->adjust.v_total_max : stream->timing.v_total;<br>
> -                             unsigned int refresh_hz = (unsigned long long) stream->timing.pix_clk_100hz *<br>
> -                                             100LL / (v_total * stream->timing.h_total);<br>
> +                             unsigned int refresh_hz = div_u64((unsigned long long) stream->timing.pix_clk_100hz *<br>
> +                                             100LL, (v_total * stream->timing.h_total));<br>
>  <br>
>                                /*<br>
>                                 * one frame time in microsec:<br>
> @@ -800,8 +800,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)<br>
>                                unsigned int denom = refresh_hz * 6528;<br>
>                                unsigned int stutter_period =<br>
> dc->current_state->perf_params.stutter_period_us;<br>
>  <br>
> -                             tmr_delay = (((1000000LL + 2 * stutter_period * refresh_hz) *<br>
> -                                             (100LL + dc->debug.mall_additional_timer_percent) + denom - 1) /<br>
> +                             tmr_delay = div_u64(((1000000LL + 2 * stutter_period * refresh_hz) *<br>
> +                                             (100LL + dc->debug.mall_additional_timer_percent) + denom - 1),<br>
>                                                denom) - 64LL;<br>
>  <br>
>                                /* scale should be increased until it fits into 6 bits */ @@<br>
> -815,8 +815,8 @@ bool dcn30_apply_idle_power_optimizations(struct dc *dc, bool enable)<br>
>                                        }<br>
>  <br>
>                                        denom *= 2;<br>
> -                                     tmr_delay = (((1000000LL + 2 * stutter_period * refresh_hz) *<br>
> -                                                     (100LL + dc->debug.mall_additional_timer_percent) + denom - 1) /<br>
> +                                     tmr_delay = div_u64(((1000000LL + 2 * stutter_period * refresh_hz) *<br>
> +                                                     (100LL + dc->debug.mall_additional_timer_percent) + denom -
<br>
> +1),<br>
>                                                        denom) - 64LL;<br>
>                                }<br>
>  <br>
> --<br>
> 2.25.1<br>
> <br>
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