<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="blue" vlink="purple" style="word-wrap:break-word"> <div class="WordSection1"> [AMD Public Use]<o:p></o:p> <o:p> </o:p> Hi , Lijo <o:p></o:p> For now we only enable this light sbr feature for SMU on XGMI + passthrough for Arcturus since this is the use case our customer is required and we only verified in this configuration . I feel it’s more reasonable to keep the logic of enable/disable in amdgpu side instead in SMU internally. We might need to support the SBR in bare-metal mode in the future . Also we plan to use this feature in future ASIC if the default HW reset method doesn’t works stable. Your suggestion will need to move the enable/disable logic into SMU internally which valid our original design. <o:p></o:p> <o:p> </o:p> Regards<o:p></o:p> Shaoyun.liu<o:p></o:p> <o:p> </o:p> <o:p> </o:p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> From: Lazar, Lijo <Lijo.Lazar@amd.com> Sent: Friday, March 12, 2021 11:54 AM To: Liu, Shaoyun <Shaoyun.Liu@amd.com>; amd-gfx@lists.freedesktop.org; Quan, Evan <Evan.Quan@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com> Subject: RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration<o:p></o:p> </div> </div> <o:p> </o:p> [AMD Public Use]<o:p></o:p> <o:p> </o:p> Looks like this can be handled during post_init. It will be called as smu_post_init() happening during late_init part of smu block. You can check vangogh or navi examples on how to add your implementation.<o:p></o:p> Thanks,<o:p></o:p> Lijo<o:p></o:p> <o:p> </o:p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> From: Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>> Sent: Friday, March 12, 2021 8:57 PM To: Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>; Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>>; Zhang, Hawking <<a href="mailto:Hawking.Zhang@amd.com">Hawking.Zhang@amd.com</a>> Subject: RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration<o:p></o:p> </div> </div> <o:p> </o:p> [AMD Public Use]<o:p></o:p> <o:p> </o:p> I don’t like to add this set_light_sbr into ppt_funcs either , but please check current swsmu code structure , there is no asic specific swsmu late init function and there is no direct routine form amdgpu_smu.c to smu_v11_0.c either . It requires smu common code ->ppt_func -> smu_v11_0 for Arcturus specific function . So unless SMU and PPT have a major re-structure , set_light_sbr need to go through ppt_func for now, I think I better leave this re-structure task to SMU and PPT owner in the future . <o:p></o:p> <o:p> </o:p> Add SMU and PPT code owner Hawking and Quan for comments . <o:p></o:p> <o:p> </o:p> Regards<o:p></o:p> Shaoyun.liu<o:p></o:p> <o:p> </o:p> <o:p> </o:p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> From: Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>> Sent: Friday, March 12, 2021 8:55 AM To: Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> Subject: RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration<o:p></o:p> </div> </div> <o:p> </o:p> [AMD Public Use]<o:p></o:p> <o:p> </o:p> We want to keep ppt_funcs minimal. Adding everything to ppt_funcs and keeping as NULL is not the right way. Please keep the code to arcturus.<o:p></o:p> <o:p> </o:p> Thanks,<o:p></o:p> Lijo<o:p></o:p> <o:p> </o:p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> From: Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>> Sent: Friday, March 12, 2021 7:21 PM To: Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> Subject: Re: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration<o:p></o:p> </div> </div> <o:p> </o:p> <div> Thanks for the comments. This light sbr solution could be applied to other asic as well. In swsmu code, It will check whether the function pointer set_light_sbr is valid before real call the function. So for other asics if the smu apply the same change, just add the ppt function pointer and we will have this support without further code change.<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div> Thanks<o:p></o:p> </div> <div> Shaoyun.liu<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> From: Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>> Sent: March 11, 2021 10:42 PM To: Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>> Cc: Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>> Subject: RE: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration <o:p></o:p> <div> <o:p></o:p> </div> </div> <div> <div> [AMD Public Use] We don't need this as a generic ppt_func. Reset functionalities are changing over programs and this could be valid only for Arcturus. Please move it to Arcturus swsmu late init. Thanks, Lijo -----Original Message----- From: amd-gfx <<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">amd-gfx-bounces@lists.freedesktop.org</a>> On Behalf Of shaoyunl Sent: Thursday, March 11, 2021 10:46 PM To: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> Cc: Liu, Shaoyun <<a href="mailto:Shaoyun.Liu@amd.com">Shaoyun.Liu@amd.com</a>> Subject: [PATCH] drm/amdgpu: Enable light SBR in XGMI+passthrough configuration This is to fix the commit dda9bbb26c7 where it only enable the light SMU on normal device init. This feature actually need to be enabled after ASIC been reset as well. Signed-off-by: shaoyunl <<a href="mailto:shaoyun.liu@amd.com">shaoyun.liu@amd.com</a>> Change-Id: Ie7ee02cd3ccdab3522aad9a02f681963e211ed44 --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index cada3e77c7d5..fb775a9c0db1 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -2513,6 +2513,9 @@ static int amdgpu_device_ip_late_init(struct amdgpu_device *adev) if (r) DRM_ERROR("enable mgpu fan boost failed (%d).\n", r); + /* For XGMI + passthrough configuration , enable light SBR */ + if (amdgpu_passthrough(adev) && adev->gmc.xgmi.num_physical_nodes > 1) + smu_set_light_sbr(&adev->smu, true); if (adev->gmc.xgmi.num_physical_nodes > 1) { mutex_lock(&mgpu_info.mutex); @@ -3615,10 +3618,6 @@ int amdgpu_device_init(struct amdgpu_device *adev, if (amdgpu_device_cache_pci_state(adev->pdev)) pci_restore_state(pdev); - /* Enable lightSBR on SMU in passthrough + xgmi configuration */ - if (amdgpu_passthrough(adev) && adev->gmc.xgmi.num_physical_nodes > 1) - smu_set_light_sbr(&adev->smu, true); - if (adev->gmc.xgmi.pending_reset) queue_delayed_work(system_wq, &mgpu_info.delayed_reset_work, msecs_to_jiffies(AMDGPU_RESUME_MS)); -- 2.17.1 _______________________________________________ amd-gfx mailing list <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <a href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Clijo.lazar%40amd.com%7Cc5aedb6c2d9d49d2fee408d8e4b15b5c%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637510797685776785%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=7ndhtOVmyZcRMe3UQiGvF%2BprCdBVgo7f6IATXSbQNg4%3D&reserved=0">https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=04%7C01%7Clijo.lazar%40amd.com%7Cc5aedb6c2d9d49d2fee408d8e4b15b5c%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637510797685776785%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=7ndhtOVmyZcRMe3UQiGvF%2BprCdBVgo7f6IATXSbQNg4%3D&reserved=0</a><o:p></o:p> </div> </div> </div> </body> </html>