<div dir="ltr"><div>Reviewed-by: Bas Nieuwenhuizen <<a href="mailto:bas@basnieuwenhuizen.nl">bas@basnieuwenhuizen.nl</a>></div><div>Tested-by: Bas Nieuwenhuizen <<a href="mailto:bas@basnieuwenhuizen.nl">bas@basnieuwenhuizen.nl</a>></div><div><br></div><div>(Checked that Weston on SIENNA_CICHLID now gets DCC)</div><div><br></div><div>Thanks!<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, Apr 15, 2021 at 7:35 PM Qingqing Zhuo <<a href="mailto:qingqing.zhuo@amd.com">qingqing.zhuo@amd.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">[Why]<br>
Current list supports modifiers that have DCC_MAX_COMPRESSED_BLOCK<br>
set to AMD_FMT_MOD_DCC_BLOCK_128B, while AMD_FMT_MOD_DCC_BLOCK_64B<br>
is used instead by userspace.<br>
<br>
[How]<br>
Replace AMD_FMT_MOD_DCC_BLOCK_128B with AMD_FMT_MOD_DCC_BLOCK_64B<br>
for modifiers with DCC supported.<br>
<br>
Fixes: 91e54fd70c6a ("drm/amd/display: Expose modifiers")<br>
Signed-off-by: Qingqing Zhuo <<a href="mailto:qingqing.zhuo@amd.com" target="_blank">qingqing.zhuo@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--<br>
1 file changed, 2 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
index e29cb2e956db..9fded25d2363 100644<br>
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
@@ -4544,7 +4544,7 @@ add_gfx10_3_modifiers(const struct amdgpu_device *adev,<br>
AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |<br>
AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |<br>
AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |<br>
- AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B));<br>
+ AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B));<br>
<br>
add_modifier(mods, size, capacity, AMD_FMT_MOD |<br>
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |<br>
@@ -4556,7 +4556,7 @@ add_gfx10_3_modifiers(const struct amdgpu_device *adev,<br>
AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |<br>
AMD_FMT_MOD_SET(DCC_INDEPENDENT_64B, 1) |<br>
AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |<br>
- AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_128B));<br>
+ AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK, AMD_FMT_MOD_DCC_BLOCK_64B));<br>
<br>
add_modifier(mods, size, capacity, AMD_FMT_MOD |<br>
AMD_FMT_MOD_SET(TILE, AMD_FMT_MOD_TILE_GFX9_64K_R_X) |<br>
-- <br>
2.17.1<br>
<br>
</blockquote></div>