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[Public]<br>
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Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Christian König <ckoenig.leichtzumerken@gmail.com><br>
<b>Sent:</b> Tuesday, May 18, 2021 11:50 AM<br>
<b>To:</b> Zhu, James <James.Zhu@amd.com><br>
<b>Cc:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> [PATCH] drm/amdgpu: stop touching sched.ready in the backend</font>
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<div class="PlainText">This unfortunately comes up in regular intervals and breaks<br>
GPU reset for the engine in question.<br>
<br>
The sched.ready flag controls if an engine can't get working<br>
during hw_init, but should never be set to false during hw_fini.<br>
<br>
Signed-off-by: Christian König <christian.koenig@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 2 --<br>
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 2 --<br>
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 5 -----<br>
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 6 ------<br>
4 files changed, 15 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c<br>
index 83531997aeba..938ef4ce5b76 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c<br>
@@ -198,8 +198,6 @@ static int jpeg_v2_5_hw_fini(void *handle)<br>
if (adev->jpeg.cur_state != AMD_PG_STATE_GATE &&<br>
RREG32_SOC15(JPEG, i, mmUVD_JRBC_STATUS))<br>
jpeg_v2_5_set_powergating_state(adev, AMD_PG_STATE_GATE);<br>
-<br>
- ring->sched.ready = false;<br>
}<br>
<br>
return 0;<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c<br>
index de5dfcfb3859..94be35357f7d 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c<br>
@@ -166,8 +166,6 @@ static int jpeg_v3_0_hw_fini(void *handle)<br>
RREG32_SOC15(JPEG, 0, mmUVD_JRBC_STATUS))<br>
jpeg_v3_0_set_powergating_state(adev, AMD_PG_STATE_GATE);<br>
<br>
- ring->sched.ready = false;<br>
-<br>
return 0;<br>
}<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
index 7c4e0586e26d..2d5d07c80307 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
@@ -497,11 +497,6 @@ static void sdma_v5_2_gfx_stop(struct amdgpu_device *adev)<br>
ib_cntl = REG_SET_FIELD(ib_cntl, SDMA0_GFX_IB_CNTL, IB_ENABLE, 0);<br>
WREG32(sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);<br>
}<br>
-<br>
- sdma0->sched.ready = false;<br>
- sdma1->sched.ready = false;<br>
- sdma2->sched.ready = false;<br>
- sdma3->sched.ready = false;<br>
}<br>
<br>
/**<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br>
index cf165ab5dd26..b512acf0e95f 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br>
@@ -388,12 +388,6 @@ static int vcn_v3_0_hw_fini(void *handle)<br>
vcn_v3_0_set_powergating_state(adev, AMD_PG_STATE_GATE);<br>
}<br>
}<br>
- ring->sched.ready = false;<br>
-<br>
- for (j = 0; j < adev->vcn.num_enc_rings; ++j) {<br>
- ring = &adev->vcn.inst[i].ring_enc[j];<br>
- ring->sched.ready = false;<br>
- }<br>
}<br>
<br>
return 0;<br>
-- <br>
2.25.1<br>
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