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    <div class="moz-cite-prefix">On 2021-06-02 2:53 a.m., Christian
      K├Ânig wrote:<br>
    </div>
    <blockquote type="cite" cite="mid:1b688ac5-e4cd-5c8b-7972-1f120186b502@gmail.com">Mostly a
      question for Felix and Philip:
      <br>
      <br>
      I've been thinking for a bit about how that case happens in the
      first place?
      <br>
      <br>
      I mean if we have a PDE which points to PTEs and then switch that
      into a 2MiB PTE then why wasn't that range invalidated before?
      <br>
      <br>
      In other words when the PDE points to the PTEs we should have had
      an unmap operation on that range before which should have
      invalidated the TLB.
      <br>
    </blockquote>
    <p>Because one cache line has 8 PDE0, after unmap flush tlb, access
      address on same PDE0 cache line will load PDE0 back into tlb. For
      example:</p>
    <p>1. map and access 0x7ffff6210000, unmap it, tlb flush<br>
    </p>
    <p>2. map and access 0x7ffff6400000, PDE0 for 0x7ffff6200000 into
      tlb, which is P=0, V=1</p>
    <p>3. map 0x7ffff6200000 update page table, access has vm fault
      because tlb has PDE0 P=0,V=1, to recover this fault, map need
      update page table and flush tlb.<br>
    </p>
    <p>Regards,</p>
    <p>Philip<br>
    </p>
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    <blockquote type="cite" cite="mid:1b688ac5-e4cd-5c8b-7972-1f120186b502@gmail.com">
      <br>
      Regards,
      <br>
      Christian.
      <br>
      <br>
      Am 02.06.21 um 00:59 schrieb Eric Huang:
      <br>
      <blockquote type="cite">It is to provide more tlb flush types
        opotion for different
        <br>
        case scenario.
        <br>
        <br>
        Signed-off-by: Eric Huang <a class="moz-txt-link-rfc2396E" href="mailto:jinhuieric.huang@amd.com"><jinhuieric.huang@amd.com></a>
        <br>
        ---
        <br>
          drivers/gpu/drm/amd/amdkfd/kfd_chardev.c              | 2 +-
        <br>
          drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 6
        +++---
        <br>
          drivers/gpu/drm/amd/amdkfd/kfd_priv.h                 | 2 +-
        <br>
          drivers/gpu/drm/amd/amdkfd/kfd_process.c              | 4 ++--
        <br>
          4 files changed, 7 insertions(+), 7 deletions(-)
        <br>
        <br>
        diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
        b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
        <br>
        index 960913a35ee4..4da8aff3df27 100644
        <br>
        --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
        <br>
        +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
        <br>
        @@ -1666,7 +1666,7 @@ static int
        kfd_ioctl_map_memory_to_gpu(struct file *filep,
        <br>
                  if (WARN_ON_ONCE(!peer_pdd))
        <br>
                      continue;
        <br>
                  if (!amdgpu_read_lock(peer->ddev, true)) {
        <br>
        -            kfd_flush_tlb(peer_pdd);
        <br>
        +            kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY);
        <br>
                      amdgpu_read_unlock(peer->ddev);
        <br>
                  }
        <br>
              }
        <br>
        diff --git
        a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
        b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
        <br>
        index 2bd621eee4e0..904b8178c1d7 100644
        <br>
        --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
        <br>
        +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
        <br>
        @@ -278,7 +278,7 @@ static int allocate_vmid(struct
        device_queue_manager *dqm,
        <br>
                      qpd->vmid,
        <br>
                      qpd->page_table_base);
        <br>
              /* invalidate the VM context after pasid and vmid mapping
        is set up */
        <br>
        -    kfd_flush_tlb(qpd_to_pdd(qpd));
        <br>
        +    kfd_flush_tlb(qpd_to_pdd(qpd), TLB_FLUSH_LEGACY);
        <br>
                if (dqm->dev->kfd2kgd->set_scratch_backing_va)
        <br>
                 
        dqm->dev->kfd2kgd->set_scratch_backing_va(dqm->dev->kgd,
        <br>
        @@ -314,7 +314,7 @@ static void deallocate_vmid(struct
        device_queue_manager *dqm,
        <br>
                  if (flush_texture_cache_nocpsch(q->device, qpd))
        <br>
                      pr_err("Failed to flush TC\n");
        <br>
          -    kfd_flush_tlb(qpd_to_pdd(qpd));
        <br>
        +    kfd_flush_tlb(qpd_to_pdd(qpd), TLB_FLUSH_LEGACY);
        <br>
                /* Release the vmid mapping */
        <br>
              set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
        <br>
        @@ -885,7 +885,7 @@ static int
        restore_process_queues_nocpsch(struct device_queue_manager *dqm,
        <br>
                          dqm->dev->kgd,
        <br>
                          qpd->vmid,
        <br>
                          qpd->page_table_base);
        <br>
        -        kfd_flush_tlb(pdd);
        <br>
        +        kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY);
        <br>
              }
        <br>
                /* Take a safe reference to the mm_struct, which may
        otherwise
        <br>
        diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
        b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
        <br>
        index ecdd5e782b81..edce3ecf207d 100644
        <br>
        --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
        <br>
        +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
        <br>
        @@ -1338,7 +1338,7 @@ void kfd_signal_reset_event(struct kfd_dev
        *dev);
        <br>
            void kfd_signal_poison_consumed_event(struct kfd_dev *dev,
        u32 pasid);
        <br>
          -void kfd_flush_tlb(struct kfd_process_device *pdd);
        <br>
        +void kfd_flush_tlb(struct kfd_process_device *pdd, enum
        TLB_FLUSH_TYPE type);
        <br>
            int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, struct
        kfd_process *p);
        <br>
          diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
        b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
        <br>
        index 3995002c582b..72741f6579d3 100644
        <br>
        --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
        <br>
        +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
        <br>
        @@ -2159,7 +2159,7 @@ int kfd_reserved_mem_mmap(struct kfd_dev
        *dev, struct kfd_process *process,
        <br>
                             KFD_CWSR_TBA_TMA_SIZE,
        vma->vm_page_prot);
        <br>
          }
        <br>
          -void kfd_flush_tlb(struct kfd_process_device *pdd)
        <br>
        +void kfd_flush_tlb(struct kfd_process_device *pdd, enum
        TLB_FLUSH_TYPE type)
        <br>
          {
        <br>
              struct kfd_dev *dev = pdd->dev;
        <br>
          @@ -2172,7 +2172,7 @@ void kfd_flush_tlb(struct
        kfd_process_device *pdd)
        <br>
                                      pdd->qpd.vmid);
        <br>
              } else {
        <br>
                  amdgpu_amdkfd_flush_gpu_tlb_pasid(dev->kgd,
        <br>
        -                    pdd->process->pasid,
        TLB_FLUSH_LEGACY);
        <br>
        +                    pdd->process->pasid, type);
        <br>
              }
        <br>
          }
        <br>
          </blockquote>
      <br>
    </blockquote>
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