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[Public]<br>
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Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Rohit Khaire <rohit.khaire@amd.com><br>
<b>Sent:</b> Friday, June 4, 2021 11:24 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Deng, Emily <Emily.Deng@amd.com>; Liu, Monk <Monk.Liu@amd.com>; Zhou, Peng Ju <PengJu.Zhou@amd.com>;
Chen, Horace <Horace.Chen@amd.com><br>
<b>Cc:</b> Ming, Davis <Davis.Ming@amd.com>; Khaire, Rohit <Rohit.Khaire@amd.com>; Koenig, Christian <Christian.Koenig@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu: Enable RLCG read/write interface for Sienna Cichlid</font>
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<div class="PlainText">Enable this only for Sienna Cichild<br>
since only Navi12 and Sienna Cichlid support SRIOV<br>
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Signed-off-by: Rohit Khaire <rohit.khaire@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-<br>
1 file changed, 1 insertion(+), 1 deletion(-)<br>
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diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
index 4a50c4e9aea0..29017b18470d 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
@@ -9217,7 +9217,6 @@ static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev)<br>
switch (adev->asic_type) {<br>
case CHIP_NAVI10:<br>
case CHIP_NAVI14:<br>
- case CHIP_SIENNA_CICHLID:<br>
case CHIP_NAVY_FLOUNDER:<br>
case CHIP_VANGOGH:<br>
case CHIP_DIMGREY_CAVEFISH:<br>
@@ -9225,6 +9224,7 @@ static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev)<br>
adev->gfx.rlc.funcs = &gfx_v10_0_rlc_funcs;<br>
break;<br>
case CHIP_NAVI12:<br>
+ case CHIP_SIENNA_CICHLID:<br>
adev->gfx.rlc.funcs = &gfx_v10_0_rlc_funcs_sriov;<br>
break;<br>
default:<br>
-- <br>
2.17.1<br>
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