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[AMD Official Use Only]<br>
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please ignore this patch, there some errors in here.</div>
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Best Regards,</div>
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Kevin</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Wang, Kevin(Yang) <Kevin1.Wang@amd.com><br>
<b>Sent:</b> Thursday, August 12, 2021 11:36 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Lazar, Lijo <Lijo.Lazar@amd.com>; Feng, Kenneth <Kenneth.Feng@amd.com>; Min, Frank <Frank.Min@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Wang, Kevin(Yang) <Kevin1.Wang@amd.com><br>
<b>Subject:</b> [PATCH v2 1/2] drm/amd/pm: skip to load smu microcode on sriov for aldebaran</font>
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<div class="PlainText">v1:<br>
1. skip to load smu firmware in sriov mode for aldebaran chip<br>
2. using vbios pptable if in sriov mode.<br>
<br>
v2:<br>
clean up smu driver code in sriov code path<br>
<br>
Signed-off-by: Kevin Wang <kevin1.wang@amd.com><br>
---<br>
 .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c    | 41 +++++++++++--------<br>
 1 file changed, 25 insertions(+), 16 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c<br>
index a421ba85bd6d..ebc081dc01cd 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c<br>
@@ -85,6 +85,10 @@ int smu_v13_0_init_microcode(struct smu_context *smu)<br>
         const struct common_firmware_header *header;<br>
         struct amdgpu_firmware_info *ucode = NULL;<br>
 <br>
+       /* doesn't need to load smu firmware in IOV mode */<br>
+       if (amdgpu_sriov_vf(adev))<br>
+               return 0;<br>
+<br>
         switch (adev->asic_type) {<br>
         case CHIP_ALDEBARAN:<br>
                 chip_name = "aldebaran";<br>
@@ -273,34 +277,38 @@ int smu_v13_0_setup_pptable(struct smu_context *smu)<br>
         struct amdgpu_device *adev = smu->adev;<br>
         const struct smc_firmware_header_v1_0 *hdr;<br>
         int ret, index;<br>
-       uint32_t size = 0;<br>
+       uint32_t size = 0, pp_table_id;<br>
         uint16_t atom_table_size;<br>
         uint8_t frev, crev;<br>
         void *table;<br>
         uint16_t version_major, version_minor;<br>
 <br>
+       if (!amdgpu_sriov_vf(adev)) {<br>
+               if (amdgpu_smu_pptable_id >= 0) {<br>
+                       pp_table_id = amdgpu_smu_pptable_id;<br>
+                       dev_info(adev->dev, "override pptable id %d\n", pp_table_id);<br>
+               } else {<br>
+                       pp_table_id = smu->smu_table.boot_values.pp_table_id;<br>
+                       dev_info(adev->dev, "use driver provided pptable %d\n", pp_table_id);<br>
+               }<br>
 <br>
-       if (amdgpu_smu_pptable_id >= 0) {<br>
-               smu->smu_table.boot_values.pp_table_id = amdgpu_smu_pptable_id;<br>
-               dev_info(adev->dev, "override pptable id %d\n", amdgpu_smu_pptable_id);<br>
-       }<br>
+               hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;<br>
+               version_major = le16_to_cpu(hdr->header.header_version_major);<br>
+               version_minor = le16_to_cpu(hdr->header.header_version_minor);<br>
+               if (version_major != 2) {<br>
+                       dev_err(adev->dev, "Unsupported smu firwmare version %d.%d\n",<br>
+                                version_major, version_minor);<br>
+                       return -EINVAL;<br>
+               }<br>
 <br>
-       hdr = (const struct smc_firmware_header_v1_0 *) adev->pm.fw->data;<br>
-       version_major = le16_to_cpu(hdr->header.header_version_major);<br>
-       version_minor = le16_to_cpu(hdr->header.header_version_minor);<br>
-       if (version_major == 2 && smu->smu_table.boot_values.pp_table_id > 0) {<br>
-               dev_info(adev->dev, "use driver provided pptable %d\n", smu->smu_table.boot_values.pp_table_id);<br>
                 switch (version_minor) {<br>
                 case 1:<br>
-                       ret = smu_v13_0_set_pptable_v2_1(smu, &table, &size,<br>
-                                                        smu->smu_table.boot_values.pp_table_id);<br>
+                       ret = smu_v13_0_set_pptable_v2_1(smu, &table, &size, pp_table_id);<br>
                         break;<br>
                 default:<br>
                         ret = -EINVAL;<br>
                         break;<br>
                 }<br>
-               if (ret)<br>
-                       return ret;<br>
 <br>
         } else {<br>
                 dev_info(adev->dev, "use vbios provided pptable\n");<br>
@@ -309,11 +317,12 @@ int smu_v13_0_setup_pptable(struct smu_context *smu)<br>
 <br>
                 ret = amdgpu_atombios_get_data_table(adev, index, &atom_table_size, &frev, &crev,<br>
                                                      (uint8_t **)&table);<br>
-               if (ret)<br>
-                       return ret;<br>
                 size = atom_table_size;<br>
         }<br>
 <br>
+       if (ret)<br>
+               return ret;<br>
+<br>
         if (!smu->smu_table.power_play_table)<br>
                 smu->smu_table.power_play_table = table;<br>
         if (!smu->smu_table.power_play_table_size)<br>
-- <br>
2.25.1<br>
<br>
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