<div dir="ltr"><div>Ah, I forgot about 4K. It looks good. Thanks!</div><div><br></div><div>Marek<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Wed, Sep 15, 2021 at 8:23 PM Joshua Ashton <<a href="mailto:joshua@froggi.es" target="_blank">joshua@froggi.es</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><br>
<br>
On 9/16/21 01:11, Marek Olšák wrote:<br>
> Based on the discussions we had about displayable DCC internally, only <br>
> MAX_COMPRESSED_BLOCK = 64B with both DCC_INDEPENDENT_64B_BLOCKS and <br>
> DCC_INDEPENDENT_128B_BLOCKS is supported by DCN on RDNA 2.<br>
> <br>
From my testing:<br>
<br>
It works fine when setting PRIMARY_SURFACE_DCC_IND_BLK to 2 <br>
(hubp_ind_block_128b) with 128b blocks alone.<br>
<br>
Previously, PRIMARY_SURFACE_DCC_IND_BLK would only ever be 1 or 0, and <br>
both of these values do not work for 128b.<br>
<br>
This change has been tested with both Gamescope compositing and for Doom <br>
Eternal.<br>
<br>
I have validated that the modifiers are in use in both of these <br>
scenarios and the register values were found and tested with<br>
<br>
sudo umr -O bits -r vangogh.dcn301.mmHUBPREQ0_DCSURF_SURFACE_CONTROL<br>
<br>
- Joshie 🐸✨<br>
<br>
<br>
> Is there something new on the hardware side that I missed?<br>
> <br>
> Marek<br>
> <br>
> On Tue, Sep 14, 2021 at 7:59 PM Joshua Ashton <<a href="mailto:joshua@froggi.es" target="_blank">joshua@froggi.es</a> <br>
> <mailto:<a href="mailto:joshua@froggi.es" target="_blank">joshua@froggi.es</a>>> wrote:<br>
> <br>
> Some games, ie. Doom Eternal, present from compute following compute<br>
> post-fx and would benefit from having DCC image stores available.<br>
> <br>
> DCN on gfx10_3 doesn't need INDEPENDENT_128B_BLOCKS = 0 so we can expose<br>
> these modifiers capable of DCC image stores.<br>
> <br>
> Signed-off-by: Joshua Ashton <<a href="mailto:joshua@froggi.es" target="_blank">joshua@froggi.es</a><br>
> <mailto:<a href="mailto:joshua@froggi.es" target="_blank">joshua@froggi.es</a>>><br>
> Reviewed-by: Bas Nieuwenhuizen <<a href="mailto:bas@basnieuwenhuizen.nl" target="_blank">bas@basnieuwenhuizen.nl</a><br>
> <mailto:<a href="mailto:bas@basnieuwenhuizen.nl" target="_blank">bas@basnieuwenhuizen.nl</a>>><br>
> ---<br>
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +++++++++++++++++++<br>
> 1 file changed, 21 insertions(+)<br>
> <br>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> index 2a24e43623cb..a4e33a4336a0 100644<br>
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c<br>
> @@ -4817,6 +4817,16 @@ add_gfx10_3_modifiers(const struct<br>
> amdgpu_device *adev,<br>
> AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |<br>
> AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK,<br>
> AMD_FMT_MOD_DCC_BLOCK_64B));<br>
> <br>
> + add_modifier(mods, size, capacity, AMD_FMT_MOD |<br>
> + AMD_FMT_MOD_SET(TILE,<br>
> AMD_FMT_MOD_TILE_GFX9_64K_R_X) |<br>
> + AMD_FMT_MOD_SET(TILE_VERSION,<br>
> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |<br>
> + AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |<br>
> + AMD_FMT_MOD_SET(PACKERS, pkrs) |<br>
> + AMD_FMT_MOD_SET(DCC, 1) |<br>
> + AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |<br>
> + AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |<br>
> + AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK,<br>
> AMD_FMT_MOD_DCC_BLOCK_128B));<br>
> +<br>
> add_modifier(mods, size, capacity, AMD_FMT_MOD |<br>
> AMD_FMT_MOD_SET(TILE,<br>
> AMD_FMT_MOD_TILE_GFX9_64K_R_X) |<br>
> AMD_FMT_MOD_SET(TILE_VERSION,<br>
> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |<br>
> @@ -4829,6 +4839,17 @@ add_gfx10_3_modifiers(const struct<br>
> amdgpu_device *adev,<br>
> AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |<br>
> AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK,<br>
> AMD_FMT_MOD_DCC_BLOCK_64B));<br>
> <br>
> + add_modifier(mods, size, capacity, AMD_FMT_MOD |<br>
> + AMD_FMT_MOD_SET(TILE,<br>
> AMD_FMT_MOD_TILE_GFX9_64K_R_X) |<br>
> + AMD_FMT_MOD_SET(TILE_VERSION,<br>
> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |<br>
> + AMD_FMT_MOD_SET(PIPE_XOR_BITS, pipe_xor_bits) |<br>
> + AMD_FMT_MOD_SET(PACKERS, pkrs) |<br>
> + AMD_FMT_MOD_SET(DCC, 1) |<br>
> + AMD_FMT_MOD_SET(DCC_RETILE, 1) |<br>
> + AMD_FMT_MOD_SET(DCC_CONSTANT_ENCODE, 1) |<br>
> + AMD_FMT_MOD_SET(DCC_INDEPENDENT_128B, 1) |<br>
> + AMD_FMT_MOD_SET(DCC_MAX_COMPRESSED_BLOCK,<br>
> AMD_FMT_MOD_DCC_BLOCK_128B));<br>
> +<br>
> add_modifier(mods, size, capacity, AMD_FMT_MOD |<br>
> AMD_FMT_MOD_SET(TILE,<br>
> AMD_FMT_MOD_TILE_GFX9_64K_R_X) |<br>
> AMD_FMT_MOD_SET(TILE_VERSION,<br>
> AMD_FMT_MOD_TILE_VER_GFX10_RBPLUS) |<br>
> -- <br>
> 2.33.0<br>
> <br>
</blockquote></div>