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<div class="moz-cite-prefix">On 2021-10-21 12:49, Russell, Kent
wrote:<br>
</div>
<blockquote type="cite" cite="mid:DM6PR12MB33243CD65F93A887F212569A85BF9@DM6PR12MB3324.namprd12.prod.outlook.com">
<pre class="moz-quote-pre" wrap="">[AMD Official Use Only]
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">-----Original Message-----
From: Tuikov, Luben <a class="moz-txt-link-rfc2396E" href="mailto:Luben.Tuikov@amd.com"><Luben.Tuikov@amd.com></a>
Sent: Thursday, October 21, 2021 12:47 PM
To: Russell, Kent <a class="moz-txt-link-rfc2396E" href="mailto:Kent.Russell@amd.com"><Kent.Russell@amd.com></a>; <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>
Cc: Joshi, Mukul <a class="moz-txt-link-rfc2396E" href="mailto:Mukul.Joshi@amd.com"><Mukul.Joshi@amd.com></a>; Kuehling, Felix <a class="moz-txt-link-rfc2396E" href="mailto:Felix.Kuehling@amd.com"><Felix.Kuehling@amd.com></a>
Subject: Re: [PATCH 2/2] drm/amdgpu: Add kernel parameter support for ignoring bad page
threshold
On 2021-10-21 12:42, Russell, Kent wrote:
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">[AMD Official Use Only]
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">-----Original Message-----
From: Tuikov, Luben <a class="moz-txt-link-rfc2396E" href="mailto:Luben.Tuikov@amd.com"><Luben.Tuikov@amd.com></a>
Sent: Thursday, October 21, 2021 12:21 PM
To: Russell, Kent <a class="moz-txt-link-rfc2396E" href="mailto:Kent.Russell@amd.com"><Kent.Russell@amd.com></a>; <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>
Cc: Joshi, Mukul <a class="moz-txt-link-rfc2396E" href="mailto:Mukul.Joshi@amd.com"><Mukul.Joshi@amd.com></a>; Kuehling, Felix <a class="moz-txt-link-rfc2396E" href="mailto:Felix.Kuehling@amd.com"><Felix.Kuehling@amd.com></a>;
Tuikov, Luben <a class="moz-txt-link-rfc2396E" href="mailto:Luben.Tuikov@amd.com"><Luben.Tuikov@amd.com></a>
Subject: Re: [PATCH 2/2] drm/amdgpu: Add kernel parameter support for ignoring bad
</pre>
</blockquote>
</blockquote>
<pre class="moz-quote-pre" wrap="">page
</pre>
<blockquote type="cite">
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">threshold
On 2021-10-21 11:57, Kent Russell wrote:
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">When a GPU hits the bad_page_threshold, it will not be initialized by
the amdgpu driver. This means that the table cannot be cleared, nor can
information gathering be performed (getting serial number, BDF, etc).
If the bad_page_threshold kernel parameter is set to -2,
continue to initialize the GPU, while printing a warning to dmesg that
this action has been done
Cc: Luben Tuikov <a class="moz-txt-link-rfc2396E" href="mailto:luben.tuikov@amd.com"><luben.tuikov@amd.com></a>
Cc: Mukul Joshi <a class="moz-txt-link-rfc2396E" href="mailto:Mukul.Joshi@amd.com"><Mukul.Joshi@amd.com></a>
Signed-off-by: Kent Russell <a class="moz-txt-link-rfc2396E" href="mailto:kent.russell@amd.com"><kent.russell@amd.com></a>
Acked-by: Felix Kuehling <a class="moz-txt-link-rfc2396E" href="mailto:Felix.Kuehling@amd.com"><Felix.Kuehling@amd.com></a>
Reviewed-by: Luben Tuikov <a class="moz-txt-link-rfc2396E" href="mailto:luben.tuikov@amd.com"><luben.tuikov@amd.com></a>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 12 ++++++++----
3 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">index d58e37fd01f4..b85b67a88a3d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -205,6 +205,7 @@ extern struct amdgpu_mgpu_info mgpu_info;
extern int amdgpu_ras_enable;
extern uint amdgpu_ras_mask;
extern int amdgpu_bad_page_threshold;
+extern bool amdgpu_ignore_bad_page_threshold;
extern struct amdgpu_watchdog_timer amdgpu_watchdog_timer;
extern int amdgpu_async_gfx_ring;
extern int amdgpu_mcbp;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">index 96bd63aeeddd..eee3cf874e7a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -877,7 +877,7 @@ module_param_named(reset_method,
</pre>
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<pre class="moz-quote-pre" wrap="">amdgpu_reset_method,
</pre>
<blockquote type="cite">
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">int, 0444);
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap=""> * result in the GPU entering bad status when the number of total
* faulty pages by ECC exceeds the threshold value.
*/
-MODULE_PARM_DESC(bad_page_threshold, "Bad page threshold(-1 = auto(default
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">value), 0 = disable bad page retirement)");
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">+MODULE_PARM_DESC(bad_page_threshold, "Bad page threshold(-1 = auto(default
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">value), 0 = disable bad page retirement, -2 = ignore bad page threshold)");
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap=""> module_param_named(bad_page_threshold, amdgpu_bad_page_threshold, int,
</pre>
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</blockquote>
</blockquote>
<pre class="moz-quote-pre" wrap="">0444);
</pre>
<blockquote type="cite">
<blockquote type="cite">
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">
MODULE_PARM_DESC(num_kcq, "number of kernel compute queue user want to
</pre>
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</blockquote>
</blockquote>
<pre class="moz-quote-pre" wrap="">setup
</pre>
<blockquote type="cite">
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">(8 if set to greater than 8 or less than 0, only affect gfx 8+)");
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">index ce5089216474..bd6ed43b0df2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c
@@ -1104,11 +1104,15 @@ int amdgpu_ras_eeprom_init(struct
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">amdgpu_ras_eeprom_control *control,
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap=""> res = amdgpu_ras_eeprom_correct_header_tag(control,
RAS_TABLE_HDR_VAL);
} else {
- *exceed_err_limit = true;
- dev_err(adev->dev,
- "RAS records:%d exceed threshold:%d, "
- "GPU will not be initialized. Replace this GPU or increase the
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">threshold",
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">+ dev_err(adev->dev, "RAS records:%d exceed threshold:%d",
control->ras_num_recs, ras->bad_page_cnt_threshold);
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">I thought this would all go in a single set of patches. I wasn't aware a singleton patch
</pre>
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</blockquote>
<pre class="moz-quote-pre" wrap="">went
</pre>
<blockquote type="cite">
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">in already which changed just this line--this change was always a part of a patch set.
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">Ah sorry. When you reviewed the original patch2 clarifying the message, I merged it and
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">then re-submitted the remaining 3 (which pared down to 2) for review. Sorry for the
confusion, I was trying to minimize the number of moving parts.
Admittedly, now you have 3 patches, one singleton and two coming in. Would've probably
be best to submit only the current two.
No worries for now--for the future.
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">
Thanks. For the most part, all of my previous multi-patch sets have been all-or-nothing. This is the first time that a patch in the middle got an RB before the rest, so I did the wrong thing and merged it while the rest was still moving. Thanks for bearing with me!</pre>
</blockquote>
<br>
Yeah, sometimes we R-B <i>some</i> patches in a set, but we don't
break off or submit them until they've all (the whole set has)
gotten an R-B. We just apply the R-B to the patches which have
gotten it and carry them around the set, and repost as you did with
your v3 patch set.<br>
<br>
No big deal at the moment, but having a single consistent set is
preferable--for the future. :-)<br>
<br>
Regards,<br>
Luben<br>
<br>
<blockquote type="cite" cite="mid:DM6PR12MB33243CD65F93A887F212569A85BF9@DM6PR12MB3324.namprd12.prod.outlook.com">
<pre class="moz-quote-pre" wrap="">
Kent
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">
Regards,
Luben
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">
Kent
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">Regards,
Luben
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">+ if (amdgpu_bad_page_threshold == -2) {
+ dev_warn(adev->dev, "GPU will be initialized due to
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">bad_page_threshold = -2.");
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">+ res = 0;
+ } else {
+ *exceed_err_limit = true;
+ dev_err(adev->dev, "GPU will not be initialized. Replace this
</pre>
</blockquote>
<pre class="moz-quote-pre" wrap="">GPU or increase the threshold.");
</pre>
<blockquote type="cite">
<pre class="moz-quote-pre" wrap="">+ }
}
} else {
DRM_INFO("Creating a new EEPROM table");
</pre>
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