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[AMD Official Use Only]<br>
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Reviewed-by: Kevin Wang <kevinyang.wang@amd.com></div>
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Best Regards,</div>
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Kevin</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Lang Yu <lang.yu@amd.com><br>
<b>Sent:</b> Wednesday, December 8, 2021 5:26 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Yu, Lang <Lang.Yu@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Huang, Ray <Ray.Huang@amd.com><br>
<b>Subject:</b> [PATCH 2/2] drm/amdgpu: only hw fini SMU fisrt for ASICs need that</font>
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<div class="PlainText">We found some headaches on ASICs don't need that,<br>
so remove that for them.<br>
<br>
Suggested-by: Lijo Lazar <lijo.lazar@amd.com><br>
Signed-off-by: Lang Yu <lang.yu@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 47 +++++++++++++++-------<br>
1 file changed, 32 insertions(+), 15 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
index 3c5afa45173c..b5b32a582c51 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
@@ -2656,6 +2656,36 @@ static int amdgpu_device_ip_late_init(struct amdgpu_device *adev)<br>
return 0;<br>
}<br>
<br>
+/**<br>
+ * amdgpu_device_smu_fini_early - smu hw_fini wrapper<br>
+ *<br>
+ * @adev: amdgpu_device pointer<br>
+ *<br>
+ * For ASICs need to disable SMC first<br>
+ */<br>
+static void amdgpu_device_smu_fini_early(struct amdgpu_device *adev)<br>
+{<br>
+ int i, r;<br>
+<br>
+ if (adev->ip_versions[GC_HWIP][0] > IP_VERSION(9, 0, 0))<br>
+ return;<br>
+<br>
+ for (i = 0; i < adev->num_ip_blocks; i++) {<br>
+ if (!adev->ip_blocks[i].status.hw)<br>
+ continue;<br>
+ if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) {<br>
+ r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);<br>
+ /* XXX handle errors */<br>
+ if (r) {<br>
+ DRM_DEBUG("hw_fini of IP block <%s> failed %d\n",<br>
+ adev->ip_blocks[i].version->funcs->name, r);<br>
+ }<br>
+ adev->ip_blocks[i].status.hw = false;<br>
+ break;<br>
+ }<br>
+ }<br>
+}<br>
+<br>
static int amdgpu_device_ip_fini_early(struct amdgpu_device *adev)<br>
{<br>
int i, r;<br>
@@ -2676,21 +2706,8 @@ static int amdgpu_device_ip_fini_early(struct amdgpu_device *adev)<br>
amdgpu_device_set_pg_state(adev, AMD_PG_STATE_UNGATE);<br>
amdgpu_device_set_cg_state(adev, AMD_CG_STATE_UNGATE);<br>
<br>
- /* need to disable SMC first */<br>
- for (i = 0; i < adev->num_ip_blocks; i++) {<br>
- if (!adev->ip_blocks[i].status.hw)<br>
- continue;<br>
- if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_SMC) {<br>
- r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);<br>
- /* XXX handle errors */<br>
- if (r) {<br>
- DRM_DEBUG("hw_fini of IP block <%s> failed %d\n",<br>
- adev->ip_blocks[i].version->funcs->name, r);<br>
- }<br>
- adev->ip_blocks[i].status.hw = false;<br>
- break;<br>
- }<br>
- }<br>
+ /* Workaroud for ASICs need to disable SMC first */<br>
+ amdgpu_device_smu_fini_early(adev);<br>
<br>
for (i = adev->num_ip_blocks - 1; i >= 0; i--) {<br>
if (!adev->ip_blocks[i].status.hw)<br>
-- <br>
2.25.1<br>
<br>
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