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[AMD Official Use Only]<br>
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Acked-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Tom St Denis <tom.stdenis@amd.com><br>
<b>Sent:</b> Friday, January 7, 2022 7:07 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> StDenis, Tom <Tom.StDenis@amd.com><br>
<b>Subject:</b> [PATCH] drm/amd/amdgpu: Add pcie indirect support to amdgpu_mm_wreg_mmio_rlc()</font>
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<div class="PlainText">The function amdgpu_mm_wreg_mmio_rlc() is used by debugfs to write to<br>
MMIO registers. It didn't support registers beyond the BAR mapped MMIO<br>
space. This adds pcie indirect write support.<br>
<br>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +++-<br>
1 file changed, 3 insertions(+), 1 deletion(-)<br>
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diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
index c38e0e87090b..53a04095a6db 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
@@ -552,7 +552,7 @@ void amdgpu_device_wreg(struct amdgpu_device *adev,<br>
}<br>
<br>
/**<br>
- * amdgpu_mm_wreg_mmio_rlc - write register either with mmio or with RLC path if in range<br>
+ * amdgpu_mm_wreg_mmio_rlc - write register either with direct/indirect mmio or with RLC path if in range<br>
*<br>
* this function is invoked only the debugfs register access<br>
*/<br>
@@ -567,6 +567,8 @@ void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,<br>
adev->gfx.rlc.funcs->is_rlcg_access_range) {<br>
if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg))<br>
return adev->gfx.rlc.funcs->sriov_wreg(adev, reg, v, 0, 0);<br>
+ } else if ((reg * 4) >= adev->rmmio_size) {<br>
+ adev->pcie_wreg(adev, reg * 4, v);<br>
} else {<br>
writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));<br>
}<br>
-- <br>
2.32.0<br>
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