<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1"> <style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style> </head> <body dir="ltr"> <p style="font-family:Arial;font-size:10pt;color:#0000FF;margin:5pt;" align="Left"> [AMD Official Use Only]<br> </p> <br> <div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Thanks <a id="OWAAM159923" class="P8b7u5KH31KY6Eljcf5yw mention ms-bgc-nlr ms-fcl-b" href="mailto:Christian.Koenig@amd.com"> @Koenig, Christian</a>.</div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <br> </div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Best Regards,</div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Kevin</div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Koenig, Christian <Christian.Koenig@amd.com><br> <b>Sent:</b> Thursday, January 20, 2022 5:11 PM<br> <b>To:</b> Wang, Yang(Kevin) <KevinYang.Wang@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Liu, Monk <Monk.Liu@amd.com><br> <b>Cc:</b> Min, Frank <Frank.Min@amd.com>; Chen, Horace <Horace.Chen@amd.com><br> <b>Subject:</b> Re: [PATCH] drm/amdgpu: force using sdma to update vm page table when mmio is blocked</font> <div> </div> </div> <div>Hi Kevin,<br> <br> well at least the HDP flush function has to work correctly or otherwise the driver won't work correctly.<br> <br> If the registers are not accessible any more we need to find a proper workaround for this.<br> <br> One possibility would be to use the KIQ, another is a dummy write/read to make sure the HDP is flushed (check the hardware docs).<br> <br> The third option would be to question if blocking the HDP registers is really a good idea.<br> <br> The solution is up to you, but a workaround like proposed below doesn't really help in any way.<br> <br> Regards,<br> Christian.<br> <br> <div class="x_moz-cite-prefix">Am 20.01.22 um 10:07 schrieb Wang, Yang(Kevin):<br> </div> <blockquote type="cite"> <p align="Left" style="margin-top: 0px; margin-bottom: 0px;font-family:Arial; font-size:10pt; color:#0000FF; margin:5pt"> [AMD Official Use Only]<br> </p> <br> <div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> Hi Chris,</div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> yes, I agree with your point.</div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <span style="color:rgb(0,0,0); font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt">and another way is that we can use KIQ to write HDP register to resolve HDP can't R/W issue.</span><br> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <span style="color:rgb(0,0,0); font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt">but it will cause some performance drop if use KIQ to programing register.</span></div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> what is your ideas?</div> <span></span> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> Best Regards,</div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> Kevin</div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Koenig, Christian <a class="x_moz-txt-link-rfc2396E" href="mailto:Christian.Koenig@amd.com"><Christian.Koenig@amd.com></a><br> <b>Sent:</b> Thursday, January 20, 2022 4:58 PM<br> <b>To:</b> Wang, Yang(Kevin) <a class="x_moz-txt-link-rfc2396E" href="mailto:KevinYang.Wang@amd.com"> <KevinYang.Wang@amd.com></a>; <a class="x_moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org"> amd-gfx@lists.freedesktop.org</a> <a class="x_moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"> <amd-gfx@lists.freedesktop.org></a>; Deucher, Alexander <a class="x_moz-txt-link-rfc2396E" href="mailto:Alexander.Deucher@amd.com"> <Alexander.Deucher@amd.com></a>; Liu, Monk <a class="x_moz-txt-link-rfc2396E" href="mailto:Monk.Liu@amd.com"> <Monk.Liu@amd.com></a><br> <b>Cc:</b> Min, Frank <a class="x_moz-txt-link-rfc2396E" href="mailto:Frank.Min@amd.com"> <Frank.Min@amd.com></a>; Chen, Horace <a class="x_moz-txt-link-rfc2396E" href="mailto:Horace.Chen@amd.com"> <Horace.Chen@amd.com></a><br> <b>Subject:</b> Re: [PATCH] drm/amdgpu: force using sdma to update vm page table when mmio is blocked</font> <div> </div> </div> <div>Well NAK.<br> <br> Even when we can't R/W HDP registers we need a way to invalidate the HDP or quite a bunch of functions won't work correctly.<br> <br> Blocking CPU base page table updates only works around the symptoms, but doesn't really solve anything.<br> <br> Regards,<br> Christian.<br> <br> <div class="x_x_moz-cite-prefix">Am 20.01.22 um 09:46 schrieb Wang, Yang(Kevin):<br> </div> <blockquote type="cite"> <p align="Left" style="margin-top: 0px; margin-bottom: 0px;margin-top:0px; margin-bottom:0px; font-family:Arial; font-size:10pt; color:#0000FF; margin:5pt"> [AMD Official Use Only]<br> </p> <br> <div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> ping...</div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> add <a id="OWAAM160069" class="x_x_P8b7u5KH31KY6Eljcf5yw x_x_mention x_x_ms-bgc-nlr x_x_ms-fcl-b" href="mailto:Monk.Liu@amd.com"> @Liu, Monk</a> <a id="OWAAM254265" class="x_x_P8b7u5KH31KY6Eljcf5yw x_x_mention x_x_ms-bgc-nlr x_x_ms-fcl-b" href="mailto:Christian.Koenig@amd.com">@Koenig, Christian</a> <a id="OWAAM277931" class="x_x_P8b7u5KH31KY6Eljcf5yw x_x_mention x_x_ms-bgc-nlr x_x_ms-fcl-b" href="mailto:Alexander.Deucher@amd.com">@Deucher, Alexander</a></div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> Best Regards,</div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> Kevin</div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Wang, Yang(Kevin) <a class="x_x_moz-txt-link-rfc2396E" href="mailto:KevinYang.Wang@amd.com"><KevinYang.Wang@amd.com></a><br> <b>Sent:</b> Wednesday, January 19, 2022 11:16 AM<br> <b>To:</b> <a class="x_x_moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org"> amd-gfx@lists.freedesktop.org</a> <a class="x_x_moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"> <amd-gfx@lists.freedesktop.org></a><br> <b>Cc:</b> Min, Frank <a class="x_x_moz-txt-link-rfc2396E" href="mailto:Frank.Min@amd.com"> <Frank.Min@amd.com></a>; Chen, Horace <a class="x_x_moz-txt-link-rfc2396E" href="mailto:Horace.Chen@amd.com"> <Horace.Chen@amd.com></a>; Wang, Yang(Kevin) <a class="x_x_moz-txt-link-rfc2396E" href="mailto:KevinYang.Wang@amd.com"> <KevinYang.Wang@amd.com></a><br> <b>Subject:</b> [PATCH] drm/amdgpu: force using sdma to update vm page table when mmio is blocked</font> <div> </div> </div> <div class="x_x_BodyFragment"><font size="2"><span style="font-size:11pt"> <div class="x_x_PlainText">when mmio protection feature is enabled in hypervisor,<br> it will cause guest OS can't R/W HDP regiters,<br> and using cpu to update page table is not working well.<br> <br> force using sdma to update page table when mmio is blocked.<br> <br> Signed-off-by: Yang Wang <a class="x_x_moz-txt-link-rfc2396E" href="mailto:KevinYang.Wang@amd.com"> <KevinYang.Wang@amd.com></a><br> ---<br> drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 +++++++<br> 1 file changed, 7 insertions(+)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br> index b23cb463b106..0f86f0b2e183 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br> @@ -2959,6 +2959,9 @@ int amdgpu_vm_init(struct amdgpu_device *adev, struct amdgpu_vm *vm)<br> vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &<br> AMDGPU_VM_USE_CPU_FOR_GFX);<br> <br> + if (vm->use_cpu_for_update && amdgpu_sriov_vf(adev) && amdgpu_virt_mmio_blocked(adev))<br> + vm->use_cpu_for_update = false;<br> +<br> DRM_DEBUG_DRIVER("VM update mode is %s\n",<br> vm->use_cpu_for_update ? "CPU" : "SDMA");<br> WARN_ONCE((vm->use_cpu_for_update &&<br> @@ -3094,6 +3097,10 @@ int amdgpu_vm_make_compute(struct amdgpu_device *adev, struct amdgpu_vm *vm)<br> /* Update VM state */<br> vm->use_cpu_for_update = !!(adev->vm_manager.vm_update_mode &<br> AMDGPU_VM_USE_CPU_FOR_COMPUTE);<br> +<br> + if (vm->use_cpu_for_update && amdgpu_sriov_vf(adev) && amdgpu_virt_mmio_blocked(adev))<br> + vm->use_cpu_for_update = false;<br> +<br> DRM_DEBUG_DRIVER("VM update mode is %s\n",<br> vm->use_cpu_for_update ? "CPU" : "SDMA");<br> WARN_ONCE((vm->use_cpu_for_update &&<br> -- <br> 2.25.1<br> <br> </div> </span></font></div> </div> </blockquote> <br> </div> </div> </blockquote> <br> </div> </div> </body> </html>