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I remember Alex adding a patch for smart suspend such that it skips the suspend call if runtime pm suspended.</div>
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In summary, the resume doesn't work with/without reset?</div>
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Thanks,<br>
Lijo</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Limonciello, Mario <Mario.Limonciello@amd.com><br>
<b>Sent:</b> Wednesday, January 26, 2022 8:47:05 PM<br>
<b>To:</b> Lazar, Lijo <Lijo.Lazar@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Liang, Prike <Prike.Liang@amd.com><br>
<b>Subject:</b> RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3</font>
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<p class="x_msipheaderc10f11a2" style="margin:0in"><span style="font-size:10.0pt; font-family:"Arial",sans-serif; color:green">[Public]</span></p>
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<p class="x_MsoNormal">Right -from an API perspective both amdgpu_acpi_is_s0ix_active and amdgpu_acpi_is_s3_active are only in suspend ops.</p>
<p class="x_MsoNormal"> </p>
<p class="x_MsoNormal">But so coming back to the 4<sup>th</sup> patch (and the associated bug), what is
<i>supposed</i> to happen with a dGPU on an Intel system that does s2i? </p>
<p class="x_MsoNormal">For AMD APU w/ dGPU in the system doing s2i I would expect that power rails have been cut off for the dGPU so putting it into S3 and doing a reset makes sense, but I don’t know about on an Intel system if that is logical.</p>
<p class="x_MsoNormal">It seems like Intel expects more that the card is going to be in runtime pm and putting it into S3 and doing reset might not be the right move.</p>
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<p class="x_MsoNormal"><b>From:</b> Lazar, Lijo <Lijo.Lazar@amd.com> <br>
<b>Sent:</b> Wednesday, January 26, 2022 09:11<br>
<b>To:</b> Limonciello, Mario <Mario.Limonciello@amd.com>; amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Liang, Prike <Prike.Liang@amd.com><br>
<b>Subject:</b> Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3</p>
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<p class="x_MsoNormal" style="background:white"><span style="color:#212121">Talking from generic API perspective - S3 is considered active for dGPU only if it's going to non-S0 state. If called from anywhere else than suspend op, this should return false.</span></p>
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<p class="x_MsoNormal"> </p>
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<p class="x_MsoNormal">Thanks,<br>
Lijo</p>
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<p class="x_MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Limonciello, Mario <<a href="mailto:Mario.Limonciello@amd.com">Mario.Limonciello@amd.com</a>><br>
<b>Sent:</b> Wednesday, January 26, 2022 8:37:28 PM<br>
<b>To:</b> Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>>;
<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br>
<b>Cc:</b> Liang, Prike <<a href="mailto:Prike.Liang@amd.com">Prike.Liang@amd.com</a>><br>
<b>Subject:</b> RE: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3</span>
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<p class="x_xmsipheaderc10f11a2" style="margin:0in"><span style="font-size:10.0pt; font-family:"Arial",sans-serif; color:green">[Public]</span></p>
<p class="x_xmsonormal"> </p>
<p class="x_xmsonormal">That was intentional – shouldn’t dGPU always be going through S3 path currently?</p>
<p class="x_xmsonormal"> </p>
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<p class="x_xmsonormal"><b>From:</b> Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>>
<br>
<b>Sent:</b> Wednesday, January 26, 2022 09:06<br>
<b>To:</b> Limonciello, Mario <<a href="mailto:Mario.Limonciello@amd.com">Mario.Limonciello@amd.com</a>>;
<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Cc:</b> Liang, Prike <<a href="mailto:Prike.Liang@amd.com">Prike.Liang@amd.com</a>>; Limonciello, Mario <<a href="mailto:Mario.Limonciello@amd.com">Mario.Limonciello@amd.com</a>><br>
<b>Subject:</b> Re: [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3</p>
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<p class="x_xmsonormal"> </p>
<p style="margin:15.0pt"><span style="font-size:10.0pt; font-family:"Arial",sans-serif; color:green">[Public]</span></p>
<p class="x_xmsonormal"> </p>
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<p class="x_xmsonormal" style="background:white"><span style="color:#212121">Returns true for dGPU always. Better to keep the whole check under something like this.</span></p>
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<p class="x_xmsonormal" style="background:white"><span style="color:#212121"> </span></p>
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<p class="x_xmsonormal" style="background:white"><span style="color:#212121">if (pm_suspend_target_state != PM_SUSPEND_ON)</span></p>
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<p class="x_xmsonormal"> </p>
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<p class="x_xmsonormal">Thanks,<br>
Lijo</p>
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<p class="x_xmsonormal"><b><span style="color:black">From:</span></b><span style="color:black"> amd-gfx <<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">amd-gfx-bounces@lists.freedesktop.org</a>> on behalf of Mario Limonciello <<a href="mailto:mario.limonciello@amd.com">mario.limonciello@amd.com</a>><br>
<b>Sent:</b> Wednesday, January 26, 2022 9:39:42 AM<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br>
<b>Cc:</b> Liang, Prike <<a href="mailto:Prike.Liang@amd.com">Prike.Liang@amd.com</a>>; Limonciello, Mario <<a href="mailto:Mario.Limonciello@amd.com">Mario.Limonciello@amd.com</a>><br>
<b>Subject:</b> [PATCH v5 2/4] drm/amd: add support to check whether the system is set to s3</span>
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<p class="x_xmsonormal" style="margin-bottom:12.0pt">This will be used to help make decisions on what to do in<br>
misconfigured systems.<br>
<br>
Signed-off-by: Mario Limonciello <<a href="mailto:mario.limonciello@amd.com">mario.limonciello@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 ++<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 17 +++++++++++++++++<br>
2 files changed, 19 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
index 3bc76759c143..f184c88d3d4f 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
@@ -1409,11 +1409,13 @@ int amdgpu_acpi_smart_shift_update(struct drm_device *dev, enum amdgpu_ss ss_sta<br>
int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);<br>
<br>
void amdgpu_acpi_get_backlight_caps(struct amdgpu_dm_backlight_caps *caps);<br>
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);<br>
bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);<br>
void amdgpu_acpi_detect(void);<br>
#else<br>
static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; }<br>
static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { }<br>
+static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false };<br>
static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; }<br>
static inline void amdgpu_acpi_detect(void) { }<br>
static inline bool amdgpu_acpi_is_power_shift_control_supported(void) { return false; }<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c<br>
index 2531da6cbec3..df673062bc03 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c<br>
@@ -1031,6 +1031,23 @@ void amdgpu_acpi_detect(void)<br>
}<br>
}<br>
<br>
+/**<br>
+ * amdgpu_acpi_is_s3_active<br>
+ *<br>
+ * @adev: amdgpu_device_pointer<br>
+ *<br>
+ * returns true if supported, false if not.<br>
+ */<br>
+bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev)<br>
+{<br>
+#if IS_ENABLED(CONFIG_SUSPEND)<br>
+ return !(adev->flags & AMD_IS_APU) ||<br>
+ pm_suspend_target_state == PM_SUSPEND_MEM;<br>
+#else<br>
+ return false;<br>
+#endif<br>
+}<br>
+<br>
/**<br>
* amdgpu_acpi_is_s0ix_active<br>
*<br>
-- <br>
2.25.1</p>
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