<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="#0563C1" vlink="#954F72" style="word-wrap:break-word"> <div class="WordSection1"> [Public]<o:p></o:p> <o:p> </o:p> > Should we set *flags = 0 before we return?<o:p></o:p> <o:p> </o:p> That will clear other bit masks. Actually, the caller initialize flags to 0, we can just return.<o:p></o:p> Or just *flags &= ~( AMD_CG_SUPPORT_XXX) before we return.<o:p></o:p> <o:p> </o:p> Regards,<o:p></o:p> Lang<o:p></o:p> <o:p> </o:p> <div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt"> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> From: Deucher, Alexander <Alexander.Deucher@amd.com> Sent: Thursday, January 27, 2022 4:27 AM To: Yu, Lang <Lang.Yu@amd.com>; amd-gfx@lists.freedesktop.org Cc: Lazar, Lijo <Lijo.Lazar@amd.com>; Huang, Ray <Ray.Huang@amd.com> Subject: Re: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers<o:p></o:p> </div> </div> <o:p> </o:p> [Public]<o:p></o:p> <o:p> </o:p> <div> <div> Should we set *flags = 0 before we return?<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div> Alex<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> From: Yu, Lang <<a href="mailto:Lang.Yu@amd.com">Lang.Yu@amd.com</a>> Sent: Wednesday, January 26, 2022 2:53 AM To: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>> Cc: Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; Lazar, Lijo <<a href="mailto:Lijo.Lazar@amd.com">Lijo.Lazar@amd.com</a>>; Huang, Ray <<a href="mailto:Ray.Huang@amd.com">Ray.Huang@amd.com</a>>; Yu, Lang <<a href="mailto:Lang.Yu@amd.com">Lang.Yu@amd.com</a>> Subject: [PATCH] drm/amdgpu: add safeguards for accessing mmhub CG registers <o:p></o:p> <div> <o:p></o:p> </div> </div> <div> <div> We observed a gpu hang when querying mmhub CG status(i.e., cat amdgpu_pm_info) on cyan skillfish. Acctually, cyan skillfish doesn't support any CG features. Only allow asics which support CG features accessing related registers. Will add similar safeguards for other IPs in the furture. Signed-off-by: Lang Yu <<a href="mailto:Lang.Yu@amd.com">Lang.Yu@amd.com</a>> --- drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c | 3 +++ drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c | 3 +++ drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 3 +++ 5 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c index 4c9f0c0f3116..1869e2019461 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c @@ -550,6 +550,9 @@ static void mmhub_v1_0_get_clockgating(struct amdgpu_device *adev, u32 *flags) { int data, data1; + if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS))) + return; + if (amdgpu_sriov_vf(adev)) *flags = 0; diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c index 3b901f941627..f7b9843b36e6 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_7.c @@ -546,6 +546,9 @@ static void mmhub_v1_7_get_clockgating(struct amdgpu_device *adev, u32 *flags) { int data, data1; + if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS))) + return; + if (amdgpu_sriov_vf(adev)) *flags = 0; diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c index 3718ff610ab2..3f5f326379b7 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c @@ -686,6 +686,9 @@ static void mmhub_v2_0_get_clockgating(struct amdgpu_device *adev, u32 *flags) { int data, data1; + if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS))) + return; + if (amdgpu_sriov_vf(adev)) *flags = 0; diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c index 9e16da28505a..b23dd9ddfb5c 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_3.c @@ -580,6 +580,9 @@ static void mmhub_v2_3_get_clockgating(struct amdgpu_device *adev, u32 *flags) { int data, data1, data2, data3; + if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS))) + return; + if (amdgpu_sriov_vf(adev)) *flags = 0; diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c index 619106f7d23d..a2d5c8424e2b 100644 --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c @@ -651,6 +651,9 @@ static void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u32 *flags) { int data, data1; + if (!(adev->cg_flags & (AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_LS))) + return; + if (amdgpu_sriov_vf(adev)) *flags = 0; -- 2.25.1<o:p></o:p> </div> </div> </div> </div> </div> </body> </html>