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[Public]<br>
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<div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="appendonsend"></div>
<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Quan, Evan <Evan.Quan@amd.com><br>
<b>Sent:</b> Friday, January 28, 2022 2:04 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Lazar, Lijo <Lijo.Lazar@amd.com>; Quan, Evan <Evan.Quan@amd.com><br>
<b>Subject:</b> [PATCH V3 5/7] drm/amd/pm: drop the cache for enabled ppfeatures</font>
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<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">The following scenarios make the driver cache for enabled ppfeatures<br>
outdated and invalid:<br>
- Other tools interact with PMFW to change the enabled ppfeatures.<br>
- PMFW may enable/disable some features behind driver's back. E.g.<br>
for sienna_cichild, on gfxoff entering, PMFW will disable gfx<br>
related DPM features. All those are performed without driver's<br>
notice.<br>
Also considering driver does not actually interact with PMFW such<br>
frequently, the benefit brought by such cache is very limited.<br>
<br>
Signed-off-by: Evan Quan <evan.quan@amd.com><br>
Change-Id: I20ed58ab216e930c7a5d223be1eb99146889f2b3<br>
---<br>
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 -<br>
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 1 -<br>
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 23 +---------<br>
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 16 +------<br>
.../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 23 +---------<br>
.../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 16 +------<br>
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 46 +++++--------------<br>
7 files changed, 17 insertions(+), 109 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
index 803068cb5079..59be1c822b2c 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
@@ -950,7 +950,6 @@ static int smu_sw_init(void *handle)<br>
smu->pool_size = adev->pm.smu_prv_buffer_size;<br>
smu->smu_feature.feature_num = SMU_FEATURE_MAX;<br>
bitmap_zero(smu->smu_feature.supported, SMU_FEATURE_MAX);<br>
- bitmap_zero(smu->smu_feature.enabled, SMU_FEATURE_MAX);<br>
bitmap_zero(smu->smu_feature.allowed, SMU_FEATURE_MAX);<br>
<br>
mutex_init(&smu->message_lock);<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br>
index 8cd1c3bb595a..721b4080d3e6 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h<br>
@@ -390,7 +390,6 @@ struct smu_feature<br>
uint32_t feature_num;<br>
DECLARE_BITMAP(supported, SMU_FEATURE_MAX);<br>
DECLARE_BITMAP(allowed, SMU_FEATURE_MAX);<br>
- DECLARE_BITMAP(enabled, SMU_FEATURE_MAX);<br>
};<br>
<br>
struct smu_clocks {<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c<br>
index d36b64371492..d71155a66f97 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c<br>
@@ -798,27 +798,8 @@ int smu_v11_0_set_allowed_mask(struct smu_context *smu)<br>
int smu_v11_0_system_features_control(struct smu_context *smu,<br>
bool en)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
- uint64_t feature_mask;<br>
- int ret = 0;<br>
-<br>
- ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :<br>
- SMU_MSG_DisableAllSmuFeatures), NULL);<br>
- if (ret)<br>
- return ret;<br>
-<br>
- bitmap_zero(feature->enabled, feature->feature_num);<br>
-<br>
- if (en) {<br>
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);<br>
- if (ret)<br>
- return ret;<br>
-<br>
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,<br>
- feature->feature_num);<br>
- }<br>
-<br>
- return ret;<br>
+ return smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :<br>
+ SMU_MSG_DisableAllSmuFeatures), NULL);<br>
}<br>
<br>
int smu_v11_0_notify_display_change(struct smu_context *smu)<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c<br>
index 478151e72889..96a5b31f708d 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c<br>
@@ -1947,27 +1947,13 @@ static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clock<br>
static int vangogh_system_features_control(struct smu_context *smu, bool en)<br>
{<br>
struct amdgpu_device *adev = smu->adev;<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
- uint64_t feature_mask;<br>
int ret = 0;<br>
<br>
if (adev->pm.fw_version >= 0x43f1700 && !en)<br>
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_RlcPowerNotify,<br>
RLC_STATUS_OFF, NULL);<br>
<br>
- bitmap_zero(feature->enabled, feature->feature_num);<br>
-<br>
- if (!en)<br>
- return ret;<br>
-<br>
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);<br>
- if (ret)<br>
- return ret;<br>
-<br>
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,<br>
- feature->feature_num);<br>
-<br>
- return 0;<br>
+ return ret;<br>
}<br>
<br>
static int vangogh_post_smu_init(struct smu_context *smu)<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c<br>
index 92b5c1108a2e..f0ab1dc3ca59 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c<br>
@@ -764,27 +764,8 @@ int smu_v13_0_gfx_off_control(struct smu_context *smu, bool enable)<br>
int smu_v13_0_system_features_control(struct smu_context *smu,<br>
bool en)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
- uint64_t feature_mask;<br>
- int ret = 0;<br>
-<br>
- ret = smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :<br>
- SMU_MSG_DisableAllSmuFeatures), NULL);<br>
- if (ret)<br>
- return ret;<br>
-<br>
- bitmap_zero(feature->enabled, feature->feature_num);<br>
-<br>
- if (en) {<br>
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);<br>
- if (ret)<br>
- return ret;<br>
-<br>
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,<br>
- feature->feature_num);<br>
- }<br>
-<br>
- return ret;<br>
+ return smu_cmn_send_smc_msg(smu, (en ? SMU_MSG_EnableAllSmuFeatures :<br>
+ SMU_MSG_DisableAllSmuFeatures), NULL);<br>
}<br>
<br>
int smu_v13_0_notify_display_change(struct smu_context *smu)<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c<br>
index d89e8a03651b..e90387a84cbb 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c<br>
@@ -195,27 +195,13 @@ static int yellow_carp_fini_smc_tables(struct smu_context *smu)<br>
<br>
static int yellow_carp_system_features_control(struct smu_context *smu, bool en)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
struct amdgpu_device *adev = smu->adev;<br>
- uint64_t feature_mask;<br>
int ret = 0;<br>
<br>
if (!en && !adev->in_s0ix)<br>
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);<br>
<br>
- bitmap_zero(feature->enabled, feature->feature_num);<br>
-<br>
- if (!en)<br>
- return ret;<br>
-<br>
- ret = smu_cmn_get_enabled_mask(smu, &feature_mask);<br>
- if (ret)<br>
- return ret;<br>
-<br>
- bitmap_copy(feature->enabled, (unsigned long *)&feature_mask,<br>
- feature->feature_num);<br>
-<br>
- return 0;<br>
+ return ret;<br>
}<br>
<br>
static int yellow_carp_dpm_set_vcn_enable(struct smu_context *smu, bool enable)<br>
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c<br>
index aae08ce62b80..3d263b27b6c2 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c<br>
@@ -496,8 +496,8 @@ int smu_cmn_feature_is_supported(struct smu_context *smu,<br>
int smu_cmn_feature_is_enabled(struct smu_context *smu,<br>
enum smu_feature_mask mask)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
struct amdgpu_device *adev = smu->adev;<br>
+ uint64_t enabled_features;<br>
int feature_id;<br>
<br>
if (smu->is_apu && adev->family < AMDGPU_FAMILY_VGH)<br>
@@ -509,9 +509,12 @@ int smu_cmn_feature_is_enabled(struct smu_context *smu,<br>
if (feature_id < 0)<br>
return 0;<br>
<br>
- WARN_ON(feature_id > feature->feature_num);<br>
+ if (smu_cmn_get_enabled_mask(smu, &enabled_features)) {<br>
+ dev_err(adev->dev, "Failed to retrieve enabled ppfeatures!\n");<br>
+ return 0;<br>
+ }<br>
<br>
- return test_bit(feature_id, feature->enabled);<br>
+ return test_bit(feature_id, (unsigned long *)&enabled_features);<br>
}<br>
<br>
bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,<br>
@@ -544,7 +547,6 @@ bool smu_cmn_clk_dpm_is_enabled(struct smu_context *smu,<br>
int smu_cmn_get_enabled_mask(struct smu_context *smu,<br>
uint64_t *feature_mask)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
struct amdgpu_device *adev = smu->adev;<br>
uint32_t *feature_mask_high;<br>
uint32_t *feature_mask_low;<br>
@@ -553,13 +555,6 @@ int smu_cmn_get_enabled_mask(struct smu_context *smu,<br>
if (!feature_mask)<br>
return -EINVAL;<br>
<br>
- if (!bitmap_empty(feature->enabled, feature->feature_num)) {<br>
- bitmap_copy((unsigned long *)feature_mask,<br>
- feature->enabled,<br>
- feature->feature_num);<br>
- return 0;<br>
- }<br>
-<br>
feature_mask_low = &((uint32_t *)feature_mask)[0];<br>
feature_mask_high = &((uint32_t *)feature_mask)[1];<br>
<br>
@@ -616,7 +611,6 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,<br>
uint64_t feature_mask,<br>
bool enabled)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
int ret = 0;<br>
<br>
if (enabled) {<br>
@@ -630,8 +624,6 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,<br>
SMU_MSG_EnableSmuFeaturesHigh,<br>
upper_32_bits(feature_mask),<br>
NULL);<br>
- if (ret)<br>
- return ret;<br>
} else {<br>
ret = smu_cmn_send_smc_msg_with_param(smu,<br>
SMU_MSG_DisableSmuFeaturesLow,<br>
@@ -643,17 +635,8 @@ int smu_cmn_feature_update_enable_state(struct smu_context *smu,<br>
SMU_MSG_DisableSmuFeaturesHigh,<br>
upper_32_bits(feature_mask),<br>
NULL);<br>
- if (ret)<br>
- return ret;<br>
}<br>
<br>
- if (enabled)<br>
- bitmap_or(feature->enabled, feature->enabled,<br>
- (unsigned long *)(&feature_mask), SMU_FEATURE_MAX);<br>
- else<br>
- bitmap_andnot(feature->enabled, feature->enabled,<br>
- (unsigned long *)(&feature_mask), SMU_FEATURE_MAX);<br>
-<br>
return ret;<br>
}<br>
<br>
@@ -661,7 +644,6 @@ int smu_cmn_feature_set_enabled(struct smu_context *smu,<br>
enum smu_feature_mask mask,<br>
bool enable)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
int feature_id;<br>
<br>
feature_id = smu_cmn_to_asic_specific_index(smu,<br>
@@ -670,8 +652,6 @@ int smu_cmn_feature_set_enabled(struct smu_context *smu,<br>
if (feature_id < 0)<br>
return -EINVAL;<br>
<br>
- WARN_ON(feature_id > feature->feature_num);<br>
-<br>
return smu_cmn_feature_update_enable_state(smu,<br>
1ULL << feature_id,<br>
enable);<br>
@@ -793,7 +773,6 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,<br>
bool no_hw_disablement,<br>
enum smu_feature_mask mask)<br>
{<br>
- struct smu_feature *feature = &smu->smu_feature;<br>
uint64_t features_to_disable = U64_MAX;<br>
int skipped_feature_id;<br>
<br>
@@ -807,15 +786,12 @@ int smu_cmn_disable_all_features_with_exception(struct smu_context *smu,<br>
features_to_disable &= ~(1ULL << skipped_feature_id);<br>
}<br>
<br>
- if (no_hw_disablement) {<br>
- bitmap_andnot(feature->enabled, feature->enabled,<br>
- (unsigned long *)(&features_to_disable), SMU_FEATURE_MAX);<br>
+ if (no_hw_disablement)<br>
return 0;<br>
- } else {<br>
- return smu_cmn_feature_update_enable_state(smu,<br>
- features_to_disable,<br>
- 0);<br>
- }<br>
+<br>
+ return smu_cmn_feature_update_enable_state(smu,<br>
+ features_to_disable,<br>
+ 0);<br>
}<br>
<br>
int smu_cmn_get_smc_version(struct smu_context *smu,<br>
-- <br>
2.29.0<br>
<br>
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