<html><head> <meta http-equiv="Content-Type" content="text/html; charset=utf-8"> </head> <body> <div class="moz-cite-prefix">On 2022-02-04 6:45 p.m., Mukul Joshi wrote: </div> <blockquote type="cite" cite="mid:20220204234513.11714-1-mukul.joshi@amd.com"> <pre class="moz-quote-pre" wrap="">With no HWS, TLB flushing will not work in SVM code. Fix this by calling kfd_flush_tlb() which works for both HWS and no HWS case. Signed-off-by: Mukul Joshi <a class="moz-txt-link-rfc2396E" href="mailto:mukul.joshi@amd.com"><mukul.joshi@amd.com></a></pre> </blockquote> With below change to remove one extra calling parameter, this patch is Reviewed-by: Philip Yang <a class="moz-txt-link-rfc2396E" href="mailto:Philip.Yang@amd.com"><Philip.Yang@amd.com></a> <blockquote type="cite" cite="mid:20220204234513.11714-1-mukul.joshi@amd.com"> <pre class="moz-quote-pre" wrap=""> --- drivers/gpu/drm/amd/amdkfd/kfd_svm.c | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c index 41f03d165bad..b1315c97b952 100644 --- a/drivers/gpu/drm/amd/amdkfd/kfd_svm.c +++ b/drivers/gpu/drm/amd/amdkfd/kfd_svm.c @@ -1229,15 +1229,14 @@ svm_range_unmap_from_gpus(struct svm_range *prange, unsigned long start, if (r) break; } - amdgpu_amdkfd_flush_gpu_tlb_pasid(pdd->dev->adev, - p->pasid, TLB_FLUSH_HEAVYWEIGHT); + kfd_flush_tlb(pdd, TLB_FLUSH_HEAVYWEIGHT); } return r; } static int -svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, +svm_range_map_to_gpu(struct amdgpu_device *adev, struct kfd_process_device *pdd,</pre> </blockquote> svm_range_map_to_gpu(struct kfd_process_device *pdd, struct svm_range *prange, <blockquote type="cite" cite="mid:20220204234513.11714-1-mukul.joshi@amd.com"> <pre class="moz-quote-pre" wrap=""> struct svm_range *prange, unsigned long offset, unsigned long npages, bool readonly, dma_addr_t *dma_addr, struct amdgpu_device *bo_adev, struct dma_fence **fence) @@ -1248,6 +1247,7 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm,</pre> </blockquote> <pre class="moz-quote-pre" wrap="">struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); struct amdgpu_device adev = pdd->dev->adev;</pre> <blockquote type="cite" cite="mid:20220204234513.11714-1-mukul.joshi@amd.com"> <pre class="moz-quote-pre" wrap=""> int last_domain; int r = 0; int64_t i, j; + struct amdgpu_vm *vm = drm_priv_to_vm(pdd->drm_priv); last_start = prange->start + offset; @@ -1305,12 +1305,8 @@ svm_range_map_to_gpu(struct amdgpu_device *adev, struct amdgpu_vm *vm, if (fence) *fence = dma_fence_get(vm->last_update); - if (table_freed) { - struct kfd_process *p; - - p = container_of(prange->svms, struct kfd_process, svms); - amdgpu_amdkfd_flush_gpu_tlb_pasid(adev, p->pasid, TLB_FLUSH_LEGACY); - } + if (table_freed) + kfd_flush_tlb(pdd, TLB_FLUSH_LEGACY); out: return r; } @@ -1351,7 +1347,7 @@ svm_range_map_to_gpus(struct svm_range *prange, unsigned long offset, continue; } - r = svm_range_map_to_gpu(pdd->dev->adev, drm_priv_to_vm(pdd->drm_priv), + r = svm_range_map_to_gpu(pdd->dev->adev, pdd,</pre> </blockquote> svm_range_map_to_gpu(pdd, prange, offset, npages <blockquote type="cite" cite="mid:20220204234513.11714-1-mukul.joshi@amd.com"> <pre class="moz-quote-pre" wrap=""> prange, offset, npages, readonly, prange->dma_addr[gpuidx], bo_adev, wait ? &fence : NULL); </pre> </blockquote> </body> </html>