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[AMD Official Use Only]<br>
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For better future proofing maybe adjust the check to look for pre-gfx10 rather than checking for specific IP versions? E.g.,</div>
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<font size="2"><span style="font-size:11pt">adev->ip_versions[MP0_HWIP][0] < IP_VERSION(10, 0, 0)</span></font><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Chen, Guchun <Guchun.Chen@amd.com><br>
<b>Sent:</b> Thursday, February 10, 2022 1:40 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Zhang, Hawking <Hawking.Zhang@amd.com>; Zhou, Peng Ju <PengJu.Zhou@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Cc:</b> Chen, Guchun <Guchun.Chen@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu: no rlcg read access in SRIOV case for gfx v9</font>
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<div class="PlainText">Fall back to MMIO to read registers as rlcg read is not<br>
available for gfx v9 in SRIOV configration. Otherwise,<br>
gmc_v9_0_flush_gpu_tlb will always complain timeout and<br>
finally breaks driver load.<br>
<br>
Fixes: 0dc4a7e75581("drm/amdgpu: switch to get_rlcg_reg_access_flag for gfx9")<br>
Signed-off-by: Guchun Chen <guchun.chen@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 13 ++++++++++++-<br>
1 file changed, 12 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c<br>
index e1288901beb6..a3274fa1c7e4 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c<br>
@@ -37,6 +37,16 @@<br>
vf2pf_info->ucode_info[ucode].version = ver; \<br>
} while (0)<br>
<br>
+static bool amdgpu_virt_is_rlcg_read_supported(struct amdgpu_device *adev)<br>
+{<br>
+ /* rlcg read is not support in SRIOV with gfx v9 */<br>
+ if ((adev->ip_versions[MP0_HWIP][0] == IP_VERSION(9, 0, 0)) ||<br>
+ (adev->ip_versions[GC_HWIP][0] == IP_VERSION(9, 4, 1)))<br>
+ return false;<br>
+<br>
+ return true;<br>
+}<br>
+<br>
bool amdgpu_virt_mmio_blocked(struct amdgpu_device *adev)<br>
{<br>
/* By now all MMIO pages except mailbox are blocked */<br>
@@ -957,7 +967,8 @@ u32 amdgpu_sriov_rreg(struct amdgpu_device *adev,<br>
u32 rlcg_flag;<br>
<br>
if (!amdgpu_sriov_runtime(adev) &&<br>
- amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag))<br>
+ amdgpu_virt_is_rlcg_read_supported(adev) &&<br>
+ amdgpu_virt_get_rlcg_reg_access_flag(adev, acc_flags, hwip, false, &rlcg_flag))<br>
return amdgpu_virt_rlcg_reg_rw(adev, offset, 0, rlcg_flag);<br>
<br>
if (acc_flags & AMDGPU_REGS_NO_KIQ)<br>
-- <br>
2.17.1<br>
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