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/* Font Definitions */
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@font-face
{font-family:DengXian;
panose-1:2 1 6 0 3 1 1 1 1 1;}
@font-face
{font-family:Calibri;
panose-1:2 15 5 2 2 2 4 3 2 4;}
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{font-family:DengXian;
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{mso-style-priority:99;
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mso-margin-top-alt:auto;
margin-right:0in;
mso-margin-bottom-alt:auto;
margin-left:0in;
font-size:11.0pt;
font-family:"Calibri",sans-serif;}
.MsoChpDefault
{mso-style-type:export-only;
font-size:10.0pt;}
@page WordSection1
{size:8.5in 11.0in;
margin:1.0in 1.25in 1.0in 1.25in;}
div.WordSection1
{page:WordSection1;}
--></style><!--[if gte mso 9]><xml>
<o:shapedefaults v:ext="edit" spidmax="1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
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<p class="msipheaderc10f11a2" style="margin:0in"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:green">[Public]</span><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Reviewed-by: Huang Rui <ray.huang@amd.com><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b>From:</b> Deucher, Alexander <Alexander.Deucher@amd.com> <br>
<b>Sent:</b> Thursday, February 10, 2022 10:57 PM<br>
<b>To:</b> Yu, Lang <Lang.Yu@amd.com>; amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Huang, Ray <Ray.Huang@amd.com><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: add support for GC 10.1.4<o:p></o:p></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p style="margin:15.0pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:green">[Public]<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Reviewed-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>><o:p></o:p></span></p>
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<div id="divRplyFwdMsg">
<p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Yu, Lang <<a href="mailto:Lang.Yu@amd.com">Lang.Yu@amd.com</a>><br>
<b>Sent:</b> Thursday, February 10, 2022 1:20 AM<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br>
<b>Cc:</b> Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; Huang, Ray <<a href="mailto:Ray.Huang@amd.com">Ray.Huang@amd.com</a>>; Yu, Lang <<a href="mailto:Lang.Yu@amd.com">Lang.Yu@amd.com</a>><br>
<b>Subject:</b> [PATCH] drm/amdgpu: add support for GC 10.1.4</span> <o:p></o:p></p>
<div>
<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">Add basic support for GC 10.1.4,<br>
it uses same IP blocks with GC 10.1.3<br>
<br>
Signed-off-by: Lang Yu <<a href="mailto:Lang.Yu@amd.com">Lang.Yu@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 6 ++++++<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 3 ++-<br>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 +++++++++<br>
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 4 +++-<br>
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +<br>
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 ++-<br>
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 1 +<br>
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 ++<br>
8 files changed, 26 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br>
index eb4b7059633d..cd7e8522c130 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br>
@@ -674,6 +674,7 @@ static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev)<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 0):<br>
case IP_VERSION(10, 3, 1):<br>
case IP_VERSION(10, 3, 2):<br>
@@ -709,6 +710,7 @@ static int amdgpu_discovery_set_gmc_ip_blocks(struct amdgpu_device *adev)<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 0):<br>
case IP_VERSION(10, 3, 1):<br>
case IP_VERSION(10, 3, 2):<br>
@@ -910,6 +912,7 @@ static int amdgpu_discovery_set_gc_ip_blocks(struct amdgpu_device *adev)<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 0):<br>
case IP_VERSION(10, 3, 2):<br>
case IP_VERSION(10, 3, 1):<br>
@@ -1044,6 +1047,7 @@ static int amdgpu_discovery_set_mes_ip_blocks(struct amdgpu_device *adev)<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 0):<br>
case IP_VERSION(10, 3, 1):<br>
case IP_VERSION(10, 3, 2):<br>
@@ -1243,6 +1247,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 0):<br>
case IP_VERSION(10, 3, 2):<br>
case IP_VERSION(10, 3, 4):<br>
@@ -1264,6 +1269,7 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)<br>
case IP_VERSION(9, 2, 2):<br>
case IP_VERSION(9, 3, 0):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 1):<br>
case IP_VERSION(10, 3, 3):<br>
adev->flags |= AMD_IS_APU;<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
index f2806959736a..9bc9155cbf06 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
@@ -137,7 +137,8 @@ static int psp_early_init(void *handle)<br>
psp->autoload_supported = true;<br>
break;<br>
case IP_VERSION(11, 0, 8):<br>
- if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2) {<br>
+ if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2 ||<br>
+ adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 4)) {<br>
psp_v11_0_8_set_psp_funcs(psp);<br>
psp->autoload_supported = false;<br>
}<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
index 3d8c5fea572e..8fb4528c741f 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
@@ -3641,6 +3641,7 @@ static void gfx_v10_0_init_golden_registers(struct amdgpu_device *adev)<br>
(const u32)ARRAY_SIZE(golden_settings_gc_10_3_5));<br>
break;<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
soc15_program_register_sequence(adev,<br>
golden_settings_gc_10_0_cyan_skillfish,<br>
(const u32)ARRAY_SIZE(golden_settings_gc_10_0_cyan_skillfish));<br>
@@ -3819,6 +3820,7 @@ static void gfx_v10_0_check_fw_write_wait(struct amdgpu_device *adev)<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
if ((adev->gfx.me_fw_version >= 0x00000046) &&<br>
(adev->gfx.me_feature_version >= 27) &&<br>
(adev->gfx.pfp_fw_version >= 0x00000068) &&<br>
@@ -3959,6 +3961,9 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)<br>
else<br>
chip_name = "cyan_skillfish";<br>
break;<br>
+ case IP_VERSION(10, 1, 4):<br>
+ chip_name = "cyan_skillfish2";<br>
+ break;<br>
default:<br>
BUG();<br>
}<br>
@@ -4565,6 +4570,7 @@ static void gfx_v10_0_gpu_early_init(struct amdgpu_device *adev)<br>
1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS);<br>
break;<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
adev->gfx.config.max_hw_contexts = 8;<br>
adev->gfx.config.sc_prim_fifo_size_frontend = 0x20;<br>
adev->gfx.config.sc_prim_fifo_size_backend = 0x100;<br>
@@ -4677,6 +4683,7 @@ static int gfx_v10_0_sw_init(void *handle)<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
adev->gfx.me.num_me = 1;<br>
adev->gfx.me.num_pipe_per_me = 1;<br>
adev->gfx.me.num_queue_per_pipe = 1;<br>
@@ -7658,6 +7665,7 @@ static int gfx_v10_0_early_init(void *handle)<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
adev->gfx.num_gfx_rings = GFX10_NUM_GFX_RINGS_NV1X;<br>
break;<br>
case IP_VERSION(10, 3, 0):<br>
@@ -9418,6 +9426,7 @@ static void gfx_v10_0_set_rlc_funcs(struct amdgpu_device *adev)<br>
case IP_VERSION(10, 1, 10):<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 2):<br>
case IP_VERSION(10, 3, 1):<br>
case IP_VERSION(10, 3, 4):<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c<br>
index bddaf2417344..c64e3a391c99 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c<br>
@@ -881,6 +881,7 @@ static int gmc_v10_0_sw_init(void *handle)<br>
case IP_VERSION(10, 1, 1):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 3, 0):<br>
case IP_VERSION(10, 3, 2):<br>
case IP_VERSION(10, 3, 1):<br>
@@ -1156,7 +1157,8 @@ static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags)<br>
{<br>
struct amdgpu_device *adev = (struct amdgpu_device *)handle;<br>
<br>
- if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 3))<br>
+ if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 3) ||<br>
+ adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 4))<br>
return;<br>
<br>
adev->mmhub.funcs->get_clockgating(adev, flags);<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c<br>
index f76834085b34..5e9ab31fee6b 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/nv.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c<br>
@@ -902,6 +902,7 @@ static int nv_common_early_init(void *handle)<br>
adev->external_rev_id = adev->rev_id + 0x01;<br>
break;<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
adev->cg_flags = 0;<br>
adev->pg_flags = 0;<br>
adev->external_rev_id = adev->rev_id + 0x82;<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br>
index 81e033549dda..45e10d5028c5 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br>
@@ -264,7 +264,8 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev)<br>
chip_name = "navi12";<br>
break;<br>
case IP_VERSION(5, 0, 1):<br>
- if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2)<br>
+ if (adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2 ||<br>
+ adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 1, 4))<br>
chip_name = "cyan_skillfish2";<br>
else<br>
chip_name = "cyan_skillfish";<br>
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c<br>
index 9624bbe8b501..bb6e49661d13 100644<br>
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c<br>
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c<br>
@@ -1411,6 +1411,7 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev,<br>
case IP_VERSION(10, 1, 10):<br>
case IP_VERSION(10, 1, 2):<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
pcache_info = navi10_cache_info;<br>
num_of_cache_types = ARRAY_SIZE(navi10_cache_info);<br>
break;<br>
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c b/drivers/gpu/drm/amd/amdkfd/kfd_device.c<br>
index dbb877fba724..7f1746289989 100644<br>
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c<br>
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c<br>
@@ -110,6 +110,7 @@ static void kfd_device_info_set_event_interrupt_class(struct kfd_dev *kfd)<br>
case IP_VERSION(10, 3, 1): /* VANGOGH */<br>
case IP_VERSION(10, 3, 3): /* YELLOW_CARP */<br>
case IP_VERSION(10, 1, 3): /* CYAN_SKILLFISH */<br>
+ case IP_VERSION(10, 1, 4):<br>
case IP_VERSION(10, 1, 10): /* NAVI10 */<br>
case IP_VERSION(10, 1, 2): /* NAVI12 */<br>
case IP_VERSION(10, 1, 1): /* NAVI14 */<br>
@@ -307,6 +308,7 @@ struct kfd_dev *kgd2kfd_probe(struct amdgpu_device *adev, bool vf)<br>
break;<br>
/* Cyan Skillfish */<br>
case IP_VERSION(10, 1, 3):<br>
+ case IP_VERSION(10, 1, 4):<br>
gfx_target_version = 100103;<br>
if (!vf)<br>
f2g = &gfx_v10_kfd2kgd;<br>
-- <br>
2.25.1<o:p></o:p></p>
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