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<div class="moz-cite-prefix">On 2/16/2022 8:26 PM, Christian König
wrote:<br>
</div>
<blockquote type="cite" cite="mid:d531c825-332d-036d-c4b4-5e2cf39edb52@gmail.com">
Am 16.02.22 um 14:11 schrieb Somalapuram, Amaranath:<br>
<blockquote type="cite" cite="mid:ed1103b1-835c-e56a-3118-17bd60f0f5f9@amd.com">
<p>On 2/16/2022 3:41 PM, Christian König wrote:<br>
</p>
<blockquote type="cite" cite="mid:e9f1e95f-5aac-4a25-51f1-b971a8189d79@amd.com">Am
16.02.22 um 10:49 schrieb Somalapuram Amaranath: <br>
<blockquote type="cite">List of register populated for dump
collection during the GPU reset. <br>
<br>
Signed-off-by: Somalapuram Amaranath <a class="moz-txt-link-rfc2396E" href="mailto:Amaranath.Somalapuram@amd.com" moz-do-not-send="true"><Amaranath.Somalapuram@amd.com></a>
<br>
--- <br>
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 5 ++ <br>
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 95
+++++++++++++++++++++ <br>
2 files changed, 100 insertions(+) <br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h <br>
index b85b67a88a3d..57965316873b 100644 <br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h <br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h <br>
@@ -1097,6 +1097,11 @@ struct amdgpu_device { <br>
struct amdgpu_reset_control *reset_cntl; <br>
uint32_t
ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE]; <br>
+ <br>
+ /* reset dump register */ <br>
+ uint32_t *reset_dump_reg_list; <br>
+ int n_regs; <br>
+ struct mutex reset_dump_mutex; <br>
</blockquote>
<br>
I think we should rather use the reset lock for this instead
of introducing just another mutex. <br>
<br>
<blockquote type="cite"> }; <br>
static inline struct amdgpu_device *drm_to_adev(struct
drm_device *ddev) <br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c <br>
index 164d6a9e9fbb..faf985c7cb93 100644 <br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c <br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c <br>
@@ -1609,6 +1609,98 @@
DEFINE_DEBUGFS_ATTRIBUTE(fops_ib_preempt, NULL, <br>
DEFINE_DEBUGFS_ATTRIBUTE(fops_sclk_set, NULL, <br>
amdgpu_debugfs_sclk_set, "%llu\n"); <br>
+static ssize_t
amdgpu_reset_dump_register_list_read(struct file *f, <br>
+ char __user *buf, size_t size, loff_t *pos)
<br>
+{ <br>
+ struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private; <br>
+ char reg_offset[11]; <br>
+ int i, r, len = 0; <br>
+ <br>
+ if (*pos) <br>
+ return 0; <br>
+ <br>
+ if (adev->n_regs == 0) <br>
+ return 0; <br>
+ <br>
+ for (i = 0; i < adev->n_regs; i++) { <br>
+ sprintf(reg_offset, "0x%x ",
adev->reset_dump_reg_list[i]); <br>
+ r = copy_to_user(buf + len, reg_offset,
strlen(reg_offset)); <br>
+ <br>
+ if (r) <br>
+ return -EFAULT; <br>
+ <br>
+ len += strlen(reg_offset); <br>
+ } <br>
</blockquote>
<br>
You need to hold the lock protecting
adev->reset_dump_reg_list and adev->n_regs while
accessing those. <br>
<br>
(BTW: num_regs instead of n_regs would match more what we use
elsewhere, but is not a must have). <br>
<br>
</blockquote>
This is read function for user and returns only list of reg
offsets, I did not understand correctly ! <br>
<blockquote type="cite" cite="mid:e9f1e95f-5aac-4a25-51f1-b971a8189d79@amd.com">
<blockquote type="cite">+ <br>
+ r = copy_to_user(buf + len, "\n", 1); <br>
+ <br>
+ if (r) <br>
+ return -EFAULT; <br>
+ <br>
+ len++; <br>
+ *pos += len; <br>
+ <br>
+ return len; <br>
+} <br>
+ <br>
+static ssize_t amdgpu_reset_dump_register_list_write(struct
file *f, <br>
+ const char __user *buf, size_t size, loff_t
*pos) <br>
+{ <br>
+ struct amdgpu_device *adev = (struct amdgpu_device
*)file_inode(f)->i_private; <br>
+ char *reg_offset, *reg, reg_temp[11]; <br>
+ static int alloc_count; <br>
+ int ret, i = 0, len = 0; <br>
+ <br>
+ do { <br>
+ reg_offset = reg_temp; <br>
+ memset(reg_offset, 0, 11); <br>
+ ret = copy_from_user(reg_offset, buf + len, min(11,
((int)size-len))); <br>
+ <br>
+ if (ret) <br>
+ goto failed; <br>
+ <br>
+ reg = strsep(®_offset, " "); <br>
+ <br>
+ if (alloc_count <= i) { <br>
</blockquote>
<br>
<blockquote type="cite">+
adev->reset_dump_reg_list = krealloc_array( <br>
+ adev->reset_dump_reg_list,
1, <br>
+ sizeof(uint32_t), GFP_KERNEL);
<br>
+ alloc_count++; <br>
+ } <br>
+ <br>
+ ret = kstrtouint(reg, 16,
&adev->reset_dump_reg_list[i]); <br>
</blockquote>
<br>
This here is modifying adev->reset_dump_reg_list as well
and so must be protected by a lock as well. <br>
<br>
The tricky part is that we can't allocate memory while holding
this lock (because we need it during reset as well). <br>
<br>
One solution for this is to read the register list into a
local array first and when that's done swap the local array
with the one in adev->reset_dump_reg_list while holding the
lock. <br>
<br>
</blockquote>
</blockquote>
</blockquote>
<p>krealloc_array should be inside lock or outside lock? this may be
problem.<br>
</p>
<p>Regards,</p>
<p>S.Amarnath<br>
</p>
<blockquote type="cite" cite="mid:d531c825-332d-036d-c4b4-5e2cf39edb52@gmail.com">
<blockquote type="cite" cite="mid:ed1103b1-835c-e56a-3118-17bd60f0f5f9@amd.com">
<blockquote type="cite" cite="mid:e9f1e95f-5aac-4a25-51f1-b971a8189d79@amd.com">
Regards, <br>
Christian. <br>
<br>
</blockquote>
There are 2 situations:<br>
1st time creating list n_regs will be 0 and trace event will not
be triggered<br>
2nd time while updating list n_regs is already set and
adev->reset_dump_reg_list will have some offsets address
(hypothetically speaking <b>during reset + update</b> read
values from RREG32 will mix up of old list and new list) <br>
its only critical when its freed and n_regs is not 0<br>
</blockquote>
<br>
No, that won't work like this. See you *must* always hold a lock
when reading or writing the array.<br>
<br>
Otherwise it is perfectly possible that one thread sees only halve
of the updates of another thread.<br>
<br>
The only alternative would be RCU, atomic replace and manual
barrier handling, but that would be complete overkill for that
feature.<br>
<br>
Regards,<br>
Christian.<br>
<br>
<blockquote type="cite" cite="mid:ed1103b1-835c-e56a-3118-17bd60f0f5f9@amd.com"> <br>
Regards,<br>
S.Amarnath<br>
<blockquote type="cite" cite="mid:e9f1e95f-5aac-4a25-51f1-b971a8189d79@amd.com">
<blockquote type="cite">+ <br>
+ if (ret) <br>
+ goto failed; <br>
+ <br>
+ len += strlen(reg) + 1; <br>
+ i++; <br>
+ <br>
+ } while (len < size); <br>
+ <br>
+ adev->n_regs = i; <br>
+ <br>
+ return size; <br>
+ <br>
+failed: <br>
+ mutex_lock(&adev->reset_dump_mutex); <br>
+ kfree(adev->reset_dump_reg_list); <br>
+ adev->reset_dump_reg_list = NULL; <br>
+ alloc_count = 0; <br>
+ adev->n_regs = 0; <br>
+ mutex_unlock(&adev->reset_dump_mutex); <br>
+ return -EFAULT; <br>
+} <br>
+ <br>
+ <br>
+ <br>
+static const struct file_operations
amdgpu_reset_dump_register_list = { <br>
+ .owner = THIS_MODULE, <br>
+ .read = amdgpu_reset_dump_register_list_read, <br>
+ .write = amdgpu_reset_dump_register_list_write, <br>
+ .llseek = default_llseek <br>
+}; <br>
+ <br>
int amdgpu_debugfs_init(struct amdgpu_device *adev) <br>
{ <br>
struct dentry *root =
adev_to_drm(adev)->primary->debugfs_root; <br>
@@ -1618,6 +1710,7 @@ int amdgpu_debugfs_init(struct
amdgpu_device *adev) <br>
if (!debugfs_initialized()) <br>
return 0; <br>
+ mutex_init(&adev->reset_dump_mutex); <br>
ent = debugfs_create_file("amdgpu_preempt_ib", 0600,
root, adev, <br>
&fops_ib_preempt); <br>
if (IS_ERR(ent)) { <br>
@@ -1672,6 +1765,8 @@ int amdgpu_debugfs_init(struct
amdgpu_device *adev) <br>
&amdgpu_debugfs_test_ib_fops); <br>
debugfs_create_file("amdgpu_vm_info", 0444, root,
adev, <br>
&amdgpu_debugfs_vm_info_fops); <br>
+ debugfs_create_file("amdgpu_reset_dump_register_list",
0644, root, adev, <br>
+ &amdgpu_reset_dump_register_list); <br>
adev->debugfs_vbios_blob.data = adev->bios; <br>
adev->debugfs_vbios_blob.size = adev->bios_size;
<br>
</blockquote>
<br>
</blockquote>
</blockquote>
<br>
</blockquote>
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