<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="#0563C1" vlink="#954F72" style="word-wrap:break-word"> <p style="font-family:Arial;font-size:10pt;color:#008000;margin:15pt;" align="Left"> [Public]<br> </p> <br> <div> <div class="WordSection1"> <p class="MsoNormal">Excellent point, exactly, we should check adev-><span style="color:black">enable_virtual_display. Let me send out a v2 soon.</span><o:p></o:p></p> <div> <p class="MsoNormal"><o:p> </o:p></p> <p class="MsoNormal">Regards,<o:p></o:p></p> <p class="MsoNormal">Guchun<o:p></o:p></p> </div> <p class="MsoNormal"><o:p> </o:p></p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> <p class="MsoNormal"><b>From:</b> Deucher, Alexander <Alexander.Deucher@amd.com> <br> <b>Sent:</b> Friday, February 18, 2022 10:39 PM<br> <b>To:</b> Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org; Zhang, Hawking <Hawking.Zhang@amd.com>; Shi, Leslie <Yuliang.Shi@amd.com>; Cui, Flora <Flora.Cui@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com><br> <b>Subject:</b> Re: [PATCH 2/2] drm/amdgpu: bypass tiling flag check in SRIOV<o:p></o:p></p> </div> </div> <p class="MsoNormal"><o:p> </o:p></p> <p style="margin:15.0pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:green">[Public]<o:p></o:p></span></p> <p class="MsoNormal"><o:p> </o:p></p> <div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black">I think we should check adev->enable_virtual_display instead of sr-iov? You can enable virtual display on bare metal as well.<o:p></o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black"><o:p> </o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black">Alex<o:p></o:p></span></p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> <p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Chen, Guchun <<a href="mailto:Guchun.Chen@amd.com">Guchun.Chen@amd.com</a>><br> <b>Sent:</b> Friday, February 18, 2022 12:11 AM<br> <b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>>; Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; Zhang, Hawking <<a href="mailto:Hawking.Zhang@amd.com">Hawking.Zhang@amd.com</a>>; Shi, Leslie <<a href="mailto:Yuliang.Shi@amd.com">Yuliang.Shi@amd.com</a>>; Cui, Flora <<a href="mailto:Flora.Cui@amd.com">Flora.Cui@amd.com</a>>; Koenig, Christian <<a href="mailto:Christian.Koenig@amd.com">Christian.Koenig@amd.com</a>>; Pan, Xinhui <<a href="mailto:Xinhui.Pan@amd.com">Xinhui.Pan@amd.com</a>><br> <b>Cc:</b> Chen, Guchun <<a href="mailto:Guchun.Chen@amd.com">Guchun.Chen@amd.com</a>><br> <b>Subject:</b> [PATCH 2/2] drm/amdgpu: bypass tiling flag check in SRIOV</span> <o:p> </o:p></p> <div> <p class="MsoNormal"> <o:p></o:p></p> </div> </div> <div> <div> <p class="MsoNormal" style="margin-bottom:12.0pt">vkms leverages common amdgpu framebuffer creation, and<br> also it does not support pixel format modifier, so there<br> is no need to check tiling flags when initing framebuffer.<br> This can fix below calltrace:<br> <br> amdgpu 0000:00:08.0: GFX9+ requires FB check based on format modifier<br> WARNING: CPU: 0 PID: 1023 at drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:1150 amdgpu_display_framebuffer_init+0x8e7/0xb40 [amdgpu]<br> <br> Signed-off-by: Leslie Shi <<a href="mailto:Yuliang.Shi@amd.com">Yuliang.Shi@amd.com</a>><br> Signed-off-by: Guchun Chen <<a href="mailto:guchun.chen@amd.com">guchun.chen@amd.com</a>><br> ---<br> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-<br> 1 file changed, 1 insertion(+), 1 deletion(-)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c<br> index 0d4ad1ee8348..63cc210e4b6b 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c<br> @@ -1150,7 +1150,7 @@ int amdgpu_display_framebuffer_init(struct drm_device *dev,<br> if (ret)<br> return ret;<br> <br> - if (!dev->mode_config.allow_fb_modifiers) {<br> + if (!dev->mode_config.allow_fb_modifiers && !amdgpu_sriov_vf(adev)) {<br> drm_WARN_ONCE(dev, adev->family >= AMDGPU_FAMILY_AI,<br> "GFX9+ requires FB check based on format modifier\n");<br> ret = check_tiling_flags_gfx6(rfb);<br> -- <br> 2.17.1<o:p></o:p></p> </div> </div> </div> </div> </div> </body> </html>