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[AMD Official Use Only]<br>
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No that's fine. Just checking.</div>
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Alex</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Chen, Guchun <Guchun.Chen@amd.com><br>
<b>Sent:</b> Tuesday, February 22, 2022 9:29 PM<br>
<b>To:</b> Alex Deucher <alexdeucher@gmail.com><br>
<b>Cc:</b> amd-gfx list <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com><br>
<b>Subject:</b> RE: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs</font>
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<div class="PlainText">Hi Alex,<br>
<br>
This patch has covered the check of VCN as well. So you want me to modify the comments to add VCN as well?<br>
<br>
Regards,<br>
Guchun<br>
<br>
-----Original Message-----<br>
From: Alex Deucher <alexdeucher@gmail.com> <br>
Sent: Wednesday, February 23, 2022 1:00 AM<br>
To: Chen, Guchun <Guchun.Chen@amd.com><br>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com><br>
Subject: Re: [PATCH] drm/amdgpu: limit harvest bit read on several ASICs<br>
<br>
On Tue, Feb 22, 2022 at 10:07 AM Guchun Chen <guchun.chen@amd.com> wrote:<br>
><br>
> Due to faulty VBIOS out there, harvest bit setting is not consistently <br>
> correct especially for display IP. So far, it's hard to work out a <br>
> solution on all the legacy Navi1x ASICs in a short time, so to avoid <br>
> regression, limit harvest bit read on several ASICs. Will revisit <br>
> later once VBIOS has corrected it in long term.<br>
><br>
<br>
Looks like it may be incorrect for VCN as well. Double check that.<br>
<br>
Alex<br>
<br>
<br>
> Fixes: b3f4ea887d5f("drm/amdgpu: read harvest bit per IP data on <br>
> legacy GPUs")<br>
> Signed-off-by: Guchun Chen <guchun.chen@amd.com><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 18 +++++++++++++-----<br>
> 1 file changed, 13 insertions(+), 5 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c <br>
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br>
> index 11255290f117..2e0ff1ace6fc 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c<br>
> @@ -1129,12 +1129,20 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device *adev)<br>
> * so read harvest bit per IP data structure to set<br>
> * harvest configuration.<br>
> */<br>
> - if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0))<br>
> - amdgpu_discovery_read_harvest_bit_per_ip(adev,<br>
> - &vcn_harvest_count);<br>
> - else<br>
> + if (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 2, 0)) {<br>
> + if ((adev->pdev->device == 0x731E &&<br>
> + (adev->pdev->revision == 0xC6 ||<br>
> + adev->pdev->revision == 0xC7)) ||<br>
> + (adev->pdev->device == 0x7340 &&<br>
> + adev->pdev->revision == 0xC9) ||<br>
> + (adev->pdev->device == 0x7360 &&<br>
> + adev->pdev->revision == 0xC7))<br>
> + amdgpu_discovery_read_harvest_bit_per_ip(adev,<br>
> + &vcn_harvest_count);<br>
> + } else {<br>
> amdgpu_disocvery_read_from_harvest_table(adev,<br>
> - &vcn_harvest_count);<br>
> + &vcn_harvest_count);<br>
> + }<br>
><br>
> amdgpu_discovery_harvest_config_quirk(adev);<br>
><br>
> --<br>
> 2.17.1<br>
><br>
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