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[AMD Official Use Only]<br>
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Plan is to now commence with VEGA20 implementation and then continue to transfer other platforms after that patch is RB'd</div>
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Thanks</div>
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Darren</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Alex Deucher <alexdeucher@gmail.com><br>
<b>Sent:</b> Wednesday, February 23, 2022 11:11 PM<br>
<b>To:</b> Powell, Darren <Darren.Powell@amd.com><br>
<b>Cc:</b> amd-gfx list <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> Re: [PATCH v3 0/3] amdgpu/pm: Implement parallel sysfs_emit solution for navi10</font>
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<div class="PlainText">On Tue, Jan 25, 2022 at 11:55 PM Darren Powell <darren.powell@amd.com> wrote:<br>
><br>
> == Description ==<br>
> Scnprintf use within the kernel is not recommended, but simple sysfs_emit replacement has<br>
> not been successful due to the page alignment requirement of the function. This patch<br>
> set implements a new api "emit_clock_levels" to facilitate passing both the base and<br>
> offset to the device rather than just the write pointer.<br>
> This patch is only implemented for navi10 for some clocks to seek comment on the<br>
> implementation before extending the implementation to other clock values and devices.<br>
<br>
Were you planning to extend this to other asics?<br>
<br>
Alex<br>
<br>
><br>
> Needs to be verified on a platform that supports the overclocking<br>
><br>
> (v3)<br>
> Rewrote patchset to order patches as (API, hw impl, usecase)<br>
> (v2)<br>
> Update to apply on commit 801771de03<br>
> adjust printing of empty carriage return only if size == 0<br>
> change return from amdgpu_dpm_emit_clock_levels if emit_clock_levels not found<br>
><br>
> == Patch Summary ==<br>
> linux: (git@gitlab.freedesktop.org:agd5f) origin/amd-staging-drm-next @ 28907fd9e048<br>
> + f3c1d971ea17 amdgpu/pm: Implement new API function "emit" that accepts buffer base and write offset<br>
> + c67ac3384682 amdgpu/pm: Implemention of emit_clk_levels for navi10 that accepts buffer base and write offset<br>
> + 734cca28fed3 amdgpu/pm: Linked emit_clock_levels to use cases amdgpu_get_pp_{dpm_clock,od_clk_voltage}<br>
><br>
> == System Summary ==<br>
> * DESKTOP(AMD FX-8350 + NAVI10(731F/ca), BIOS: F2)<br>
> + ISO(Ubuntu 20.04.3 LTS)<br>
> + Kernel(5.13.0-fdoagd5f-20220112-g28907fd9e0)<br>
><br>
> == Test ==<br>
> LOGFILE=pp_clk.test.log<br>
> AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`<br>
> AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`<br>
> HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}<br>
><br>
> lspci -nn | grep "VGA\|Display" > $LOGFILE<br>
> FILES="pp_od_clk_voltage<br>
> pp_dpm_sclk<br>
> pp_dpm_mclk<br>
> pp_dpm_pcie<br>
> pp_dpm_socclk<br>
> pp_dpm_fclk<br>
> pp_dpm_dcefclk<br>
> pp_dpm_vclk<br>
> pp_dpm_dclk "<br>
><br>
> for f in $FILES<br>
> do<br>
> echo === $f === >> $LOGFILE<br>
> cat $HWMON_DIR/device/$f >> $LOGFILE<br>
> done<br>
> cat $LOGFILE<br>
><br>
> Darren Powell (3):<br>
> amdgpu/pm: Implement new API function "emit" that accepts buffer base<br>
> and write offset<br>
> amdgpu/pm: Implemention of emit_clk_levels for navi10 that accepts<br>
> buffer base and write offset<br>
> amdgpu/pm: Linked emit_clock_levels to use cases<br>
> amdgpu_get_pp_{dpm_clock,od_clk_voltage}<br>
><br>
> .../gpu/drm/amd/include/kgd_pp_interface.h | 1 +<br>
> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 21 ++<br>
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 49 +++--<br>
> drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 4 +<br>
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 42 +++-<br>
> drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 14 ++<br>
> .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 188 ++++++++++++++++++<br>
> 7 files changed, 300 insertions(+), 19 deletions(-)<br>
><br>
><br>
> base-commit: 28907fd9e04859fab86a143271d29ff0ff043154<br>
> --<br>
> 2.34.1<br>
><br>
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