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[AMD Official Use Only]<br>
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PING?
<div>** https://lore.kernel.org/amd-gfx/20220313052839.5777-1-darren.powell@amd.com/T/#u</div>
<div> [PATCH v1 0/2] amdgpu/pm: Implement parallel sysfs_emit solution for vega10
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<div> 2022-03-13 5:28 UTC (3+ messages)</div>
<div> ` [PATCH 1/2] amdgpu/pm: Add new hwmgr API function "emit_clock_levels"</div>
<div> ` [PATCH 2/2] amdgpu/pm: Implement emit_clk_levels for vega10</div>
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<div> Thanks</div>
<span> Darren</span><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Powell, Darren <Darren.Powell@amd.com><br>
<b>Sent:</b> Sunday, March 13, 2022 12:28 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Powell, Darren <Darren.Powell@amd.com><br>
<b>Subject:</b> [PATCH v1 0/2] amdgpu/pm: Implement parallel sysfs_emit solution for vega10</font>
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<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">== Description ==<br>
Scnprintf use within the kernel is not recommended, but simple sysfs_emit replacement has<br>
not been successful due to the page alignment requirement of the function. This patch<br>
set implements a new api "emit_clock_levels" to facilitate passing both the base and<br>
offset to the device rather than just the write pointer.<br>
<br>
The emit_clock_levels API for amdgpu_dpm has been duplicated to pp_dpm, based on the patch
<br>
commit 7f36948c92b2 ("amdgpu/pm: Implement new API function "emit" that accepts buffer base and write offset")<br>
and vega10_emit_clock_levels has been implemented with sysfs_emit based on vega10_print_clock_levels<br>
<br>
<br>
== Patch Summary ==<br>
linux: (git@gitlab.freedesktop.org:agd5f) origin/amd-staging-drm-next @ 6b6b9c625004<br>
+ e94021f6c08c amdgpu/pm: Add new hwmgr API function "emit_clock_levels"<br>
+ d83131987718 amdgpu/pm: Implement emit_clk_levels for vega10<br>
<br>
== System Summary ==<br>
* DESKTOP(AMD FX-8350 + VEGA10(687f/c3), BIOS: F2)<br>
+ ISO(Ubuntu 20.04.4 LTS)<br>
+ Kernel(5.16.0-20220307-fdoagd5f-g6b6b9c625004)<br>
+ Overdrive Enabled(amdgpu.ppfeaturemask |= 0x4000)<br>
<br>
== Test ==<br>
AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`<br>
AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`<br>
HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}<br>
<br>
lspci -nn | grep "VGA\|Display" > $LOGFILE<br>
printf 'OD enabled = %X\n' "$(( `cat /sys/module/amdgpu/parameters/ppfeaturemask` & 0x4000 ))" >> $LOGFILE<br>
FILES="pp_od_clk_voltage<br>
pp_dpm_sclk<br>
pp_dpm_mclk<br>
pp_dpm_pcie<br>
pp_dpm_socclk<br>
pp_dpm_fclk<br>
pp_dpm_dcefclk<br>
pp_dpm_vclk<br>
pp_dpm_dclk "<br>
<br>
for f in $FILES<br>
do<br>
echo === $f === >> $LOGFILE<br>
cat $HWMON_DIR/device/$f >> $LOGFILE<br>
done<br>
cat $LOGFILE<br>
<br>
Darren Powell (2):<br>
amdgpu/pm: Add new hwmgr API function "emit_clock_levels"<br>
amdgpu/pm: Implement emit_clk_levels for vega10<br>
<br>
.../gpu/drm/amd/pm/powerplay/amd_powerplay.c | 17 ++<br>
.../drm/amd/pm/powerplay/hwmgr/vega10_hwmgr.c | 147 ++++++++++++++++++<br>
drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h | 2 +<br>
3 files changed, 166 insertions(+)<br>
<br>
<br>
base-commit: 6b6b9c625004e07e000ca1918cadcb64439eb498<br>
-- <br>
2.35.1<br>
<br>
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