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[AMD Official Use Only]<br>
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Thank you very much for your suggestion, but I have already submitted.</div>
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Regards,</div>
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Rico</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Chen, Guchun <Guchun.Chen@amd.com><br>
<b>Sent:</b> Monday, March 28, 2022 10:17<br>
<b>To:</b> Chen, Guchun <Guchun.Chen@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Wang, Yu (Charlie) <Yu.Wang4@amd.com>; Zhu, James <James.Zhu@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com><br>
<b>Subject:</b> RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0</font>
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<div class="PlainText">Hi Tianci,<br>
<br>
I think we shall improve the subject a bit like "drm/amdgpu: fix incorrect instance id passing when stopping dpg mode". How do you think?<br>
<br>
Regards,<br>
Guchun<br>
<br>
-----Original Message-----<br>
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Chen, Guchun<br>
Sent: Monday, March 28, 2022 9:26 AM<br>
To: Yin, Tianci (Rico) <Tianci.Yin@amd.com>; amd-gfx@lists.freedesktop.org<br>
Cc: Wang, Yu (Charlie) <Yu.Wang4@amd.com>; Zhu, James <James.Zhu@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com><br>
Subject: RE: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0<br>
<br>
Reviewed-by: Guchun Chen <guchun.chen@amd.com><br>
<br>
Regards,<br>
Guchun<br>
<br>
-----Original Message-----<br>
From: Tianci Yin <tianci.yin@amd.com> <br>
Sent: Sunday, March 27, 2022 7:19 PM<br>
To: amd-gfx@lists.freedesktop.org<br>
Cc: Chen, Guchun <Guchun.Chen@amd.com>; Zhu, James <James.Zhu@amd.com>; Wang, Yu (Charlie) <Yu.Wang4@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com><br>
Subject: [PATCH] drm/amd/vcn: fix an error msg on vcn 3.0<br>
<br>
From: tiancyin <tianci.yin@amd.com><br>
<br>
Some video card has more than one vcn instance, passing 0 to vcn_v3_0_pause_dpg_mode is incorrect.<br>
<br>
Error msg:<br>
Register(1) [mmUVD_POWER_STATUS] failed to reach value<br>
0x00000001 != 0x00000002<br>
<br>
Signed-off-by: tiancyin <tianci.yin@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-<br>
1 file changed, 1 insertion(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br>
index e1cca0a10653..cb5f0a12333f 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c<br>
@@ -1488,7 +1488,7 @@ static int vcn_v3_0_stop_dpg_mode(struct amdgpu_device *adev, int inst_idx)<br>
struct dpg_pause_state state = {.fw_based = VCN_DPG_STATE__UNPAUSE};<br>
uint32_t tmp;<br>
<br>
- vcn_v3_0_pause_dpg_mode(adev, 0, &state);<br>
+ vcn_v3_0_pause_dpg_mode(adev, inst_idx, &state);<br>
<br>
/* Wait for power status to be 1 */<br>
SOC15_WAIT_ON_RREG(VCN, inst_idx, mmUVD_POWER_STATUS, 1,<br>
--<br>
2.25.1<br>
<br>
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