<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style>
</head>
<body dir="ltr">
<p style="font-family:Arial;font-size:10pt;color:#0000FF;margin:5pt;" align="Left">
[AMD Official Use Only - General]<br>
</p>
<br>
<div>
<div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
<br>
</div>
<div id="appendonsend"></div>
<div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)">
<br>
</div>
<hr tabindex="-1" style="display:inline-block; width:98%">
<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Quan, Evan <Evan.Quan@amd.com><br>
<b>Sent:</b> Friday, June 10, 2022 10:55 AM<br>
<b>To:</b> Wang, Yang(Kevin) <KevinYang.Wang@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Feng, Kenneth <Kenneth.Feng@amd.com>; Wang, Yang(Kevin) <KevinYang.Wang@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com><br>
<b>Subject:</b> RE: [PATCH] drm/amd/pm: fix driver reload SMC firmware fail issue for smu13</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span style="font-size:11pt">
<div class="PlainText elementToProof">[AMD Official Use Only - General]<br>
<br>
Will this break gpu reset? As PPSMC_MSG_PrepareMp1ForUnload may put SMC into out-of-service state. That may make it unable to serve succeeding reset messages.<br>
Can you have a confirm?<br>
<br>
BR<br>
Evan</div>
<div class="PlainText elementToProof"><br>
</div>
<div class="PlainText elementToProof">[kevin]:</div>
<div class="PlainText elementToProof"><br>
</div>
<div class="PlainText elementToProof">I missed this case, it will cause gpu reset fail when do SMC unload.</div>
<div class="PlainText elementToProof">I will submit a new patch to fix this issue.</div>
<div class="PlainText elementToProof"><br>
</div>
<div class="PlainText elementToProof">thanks.</div>
<div class="PlainText elementToProof"><br>
</div>
<div class="PlainText elementToProof">Best Regards,</div>
<div class="PlainText elementToProof">Kevin<br>
> -----Original Message-----<br>
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Yang<br>
> Wang<br>
> Sent: Thursday, June 9, 2022 7:33 PM<br>
> To: amd-gfx@lists.freedesktop.org<br>
> Cc: Feng, Kenneth <Kenneth.Feng@amd.com>; Wang, Yang(Kevin)<br>
> <KevinYang.Wang@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com><br>
> Subject: [PATCH] drm/amd/pm: fix driver reload SMC firmware fail issue for<br>
> smu13<br>
> <br>
> issue calltrace:<br>
> [ 402.773695] [drm] failed to load ucode SMC(0x2C)<br>
> [ 402.773754] [drm] psp gfx command LOAD_IP_FW(0x6) failed and<br>
> response status is (0x0)<br>
> [ 402.773762] [drm:psp_load_smu_fw [amdgpu]] *ERROR* PSP load smu<br>
> failed!<br>
> [ 402.966758] [drm:psp_v13_0_ring_destroy [amdgpu]] *ERROR* Fail to stop<br>
> psp ring<br>
> [ 402.966949] [drm:psp_hw_init [amdgpu]] *ERROR* PSP firmware loading<br>
> failed<br>
> [ 402.967116] [drm:amdgpu_device_fw_loading [amdgpu]] *ERROR*<br>
> hw_init of IP block <psp> failed -22<br>
> [ 402.967252] amdgpu 0000:03:00.0: amdgpu: amdgpu_device_ip_init failed<br>
> [ 402.967255] amdgpu 0000:03:00.0: amdgpu: Fatal error during GPU init<br>
> <br>
> if not reset mp1 state during kernel driver unload, it will cause psp<br>
> load pmfw fail at the second time.<br>
> <br>
> add PPSMC_MSG_PrepareMp1ForUnload support for<br>
> smu_v13_0_0/smu_v13_0_7<br>
> <br>
> Signed-off-by: Yang Wang <KevinYang.Wang@amd.com><br>
> ---<br>
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 8 ++++++++<br>
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 ++<br>
> drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 2 ++<br>
> 3 files changed, 12 insertions(+)<br>
> <br>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
> index f57710790b8c..14ebc35d9cf0 100644<br>
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c<br>
> @@ -66,6 +66,8 @@ static int smu_set_fan_control_mode(void *handle, u32<br>
> value);<br>
> static int smu_set_power_limit(void *handle, uint32_t limit);<br>
> static int smu_set_fan_speed_rpm(void *handle, uint32_t speed);<br>
> static int smu_set_gfx_cgpg(struct smu_context *smu, bool enabled);<br>
> +static int smu_set_mp1_state(void *handle, enum pp_mp1_state<br>
> mp1_state);<br>
> +<br>
> <br>
> static int smu_sys_get_pp_feature_mask(void *handle,<br>
> char *buf)<br>
> @@ -1414,6 +1416,12 @@ static int smu_disable_dpms(struct smu_context<br>
> *smu)<br>
> switch (adev->ip_versions[MP1_HWIP][0]) {<br>
> case IP_VERSION(13, 0, 0):<br>
> case IP_VERSION(13, 0, 7):<br>
> + ret = smu_set_mp1_state(smu, PP_MP1_STATE_UNLOAD);<br>
> + if (ret) {<br>
> + dev_err(adev->dev, "Fail set mp1 state to<br>
> UNLOAD !\n");<br>
> + return ret;<br>
> + }<br>
> +<br>
> return 0;<br>
> default:<br>
> break;<br>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c<br>
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c<br>
> index 26fb72a588e7..fda89e309b07 100644<br>
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c<br>
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c<br>
> @@ -118,6 +118,7 @@ static struct cmn2asic_msg_mapping<br>
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] =<br>
> MSG_MAP(GetPptLimit,<br>
> PPSMC_MSG_GetPptLimit, 0),<br>
> MSG_MAP(NotifyPowerSource,<br>
> PPSMC_MSG_NotifyPowerSource, 0),<br>
> MSG_MAP(Mode1Reset,<br>
> PPSMC_MSG_Mode1Reset, 0),<br>
> + MSG_MAP(PrepareMp1ForUnload,<br>
> PPSMC_MSG_PrepareMp1ForUnload, 0),<br>
> };<br>
> <br>
> static struct cmn2asic_mapping smu_v13_0_0_clk_map[SMU_CLK_COUNT]<br>
> = {<br>
> @@ -1662,6 +1663,7 @@ static const struct pptable_funcs<br>
> smu_v13_0_0_ppt_funcs = {<br>
> .baco_exit = smu_v13_0_baco_exit,<br>
> .mode1_reset_is_support =<br>
> smu_v13_0_0_is_mode1_reset_supported,<br>
> .mode1_reset = smu_v13_0_mode1_reset,<br>
> + .set_mp1_state = smu_cmn_set_mp1_state,<br>
> };<br>
> <br>
> void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)<br>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c<br>
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c<br>
> index a92ab3266091..185058637f7d 100644<br>
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c<br>
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c<br>
> @@ -116,6 +116,7 @@ static struct cmn2asic_msg_mapping<br>
> smu_v13_0_7_message_map[SMU_MSG_MAX_COUNT] =<br>
> MSG_MAP(DramLogSetDramSize,<br>
> PPSMC_MSG_DramLogSetDramSize, 0),<br>
> MSG_MAP(AllowGfxOff,<br>
> PPSMC_MSG_AllowGfxOff, 0),<br>
> MSG_MAP(DisallowGfxOff,<br>
> PPSMC_MSG_DisallowGfxOff, 0),<br>
> + MSG_MAP(PrepareMp1ForUnload,<br>
> PPSMC_MSG_PrepareMp1ForUnload, 0),<br>
> };<br>
> <br>
> static struct cmn2asic_mapping smu_v13_0_7_clk_map[SMU_CLK_COUNT]<br>
> = {<br>
> @@ -1647,6 +1648,7 @@ static const struct pptable_funcs<br>
> smu_v13_0_7_ppt_funcs = {<br>
> .baco_set_state = smu_v13_0_7_baco_set_state,<br>
> .baco_enter = smu_v13_0_7_baco_enter,<br>
> .baco_exit = smu_v13_0_baco_exit,<br>
> + .set_mp1_state = smu_cmn_set_mp1_state,<br>
> };<br>
> <br>
> void smu_v13_0_7_set_ppt_funcs(struct smu_context *smu)<br>
> --<br>
> 2.25.1<br>
</div>
</span></font></div>
</div>
</body>
</html>