<div dir="ltr"><div>Reviewed-by: Marek Olšák <<a href="mailto:marek.olsak@amd.com">marek.olsak@amd.com</a>></div><div><br></div><div>for the series.</div><div><br></div><div>Marek<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Jul 19, 2022 at 3:53 PM Alex Deucher <<a href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Ping on this series.<br>
<br>
Alex<br>
<br>
On Fri, Jul 8, 2022 at 6:56 PM Alex Deucher <<a href="mailto:alexander.deucher@amd.com" target="_blank">alexander.deucher@amd.com</a>> wrote:<br>
><br>
> Use the former pad element to store the IP versions from the<br>
> IP discovery table. This allows userspace to get the IP<br>
> version from the kernel to better align with hardware IP<br>
> versions.<br>
><br>
> Proposed mesa patch:<br>
> <a href="https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075" rel="noreferrer" target="_blank">https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075</a><br>
><br>
> Signed-off-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com" target="_blank">alexander.deucher@amd.com</a>><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 24 ++++++++++++++++++++++++<br>
> include/uapi/drm/amdgpu_drm.h | 3 ++-<br>
> 2 files changed, 26 insertions(+), 1 deletion(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c<br>
> index 4b44a4bc2fb3..7e03f3719d11 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c<br>
> @@ -473,6 +473,30 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,<br>
><br>
> result->hw_ip_version_major = adev->ip_blocks[i].version->major;<br>
> result->hw_ip_version_minor = adev->ip_blocks[i].version->minor;<br>
> +<br>
> + if (adev->asic_type >= CHIP_VEGA10) {<br>
> + switch (type) {<br>
> + case AMD_IP_BLOCK_TYPE_GFX:<br>
> + result->ip_discovery_version = adev->ip_versions[GC_HWIP][0];<br>
> + break;<br>
> + case AMD_IP_BLOCK_TYPE_SDMA:<br>
> + result->ip_discovery_version = adev->ip_versions[SDMA0_HWIP][0];<br>
> + break;<br>
> + case AMD_IP_BLOCK_TYPE_UVD:<br>
> + case AMD_IP_BLOCK_TYPE_VCN:<br>
> + case AMD_IP_BLOCK_TYPE_JPEG:<br>
> + result->ip_discovery_version = adev->ip_versions[UVD_HWIP][0];<br>
> + break;<br>
> + case AMD_IP_BLOCK_TYPE_VCE:<br>
> + result->ip_discovery_version = adev->ip_versions[VCE_HWIP][0];<br>
> + break;<br>
> + default:<br>
> + result->ip_discovery_version = 0;<br>
> + break;<br>
> + }<br>
> + } else {<br>
> + result->ip_discovery_version = 0;<br>
> + }<br>
> result->capabilities_flags = 0;<br>
> result->available_rings = (1 << num_rings) - 1;<br>
> result->ib_start_alignment = ib_start_alignment;<br>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h<br>
> index 18d3246d636e..3a2674b4a2d9 100644<br>
> --- a/include/uapi/drm/amdgpu_drm.h<br>
> +++ b/include/uapi/drm/amdgpu_drm.h<br>
> @@ -1093,7 +1093,8 @@ struct drm_amdgpu_info_hw_ip {<br>
> __u32 ib_size_alignment;<br>
> /** Bitmask of available rings. Bit 0 means ring 0, etc. */<br>
> __u32 available_rings;<br>
> - __u32 _pad;<br>
> + /** version info: bits 23:16 major, 15:8 minor, 7:0 revision */<br>
> + __u32 ip_discovery_version;<br>
> };<br>
><br>
> struct drm_amdgpu_info_num_handles {<br>
> --<br>
> 2.35.3<br>
><br>
</blockquote></div>