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[AMD Official Use Only - General]<br>
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The series is <span style="font-size:12pt;margin:0px;color:black;background-color:rgb(255, 255, 255)" class="ContentPasted0">Reviewed-by: Jack Xiao <Jack.Xiao@amd.com></span>
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Regards,</div>
<span style="font-size:12pt;margin:0px;color:black;background-color:rgb(255, 255, 255)" class="ContentPasted0">Jack</span></div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Sider, Graham <Graham.Sider@amd.com><br>
<b>Sent:</b> Wednesday, 26 October 2022 03:20<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Xiao, Jack <Jack.Xiao@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Sider, Graham <Graham.Sider@amd.com><br>
<b>Subject:</b> [PATCH 2/2] drm/amdgpu: remove deprecated MES version vars</font>
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<div class="PlainText">MES scheduler and kiq versions are stored in mes.sched_version and<br>
mes.kiq_version, respectively, which are read from a register after<br>
their queues are initialized. Remove mes.ucode_fw_version and<br>
mes.data_fw_version which tried to read this versioning info from the<br>
firmware headers (which don't contain this information).<br>
<br>
Signed-off-by: Graham Sider <Graham.Sider@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h | 2 --<br>
drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 4 ----<br>
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 4 ----<br>
3 files changed, 10 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
index ad980f4b66e1..97c05d08a551 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h<br>
@@ -91,14 +91,12 @@ struct amdgpu_mes {<br>
struct amdgpu_bo *ucode_fw_obj[AMDGPU_MAX_MES_PIPES];<br>
uint64_t ucode_fw_gpu_addr[AMDGPU_MAX_MES_PIPES];<br>
uint32_t *ucode_fw_ptr[AMDGPU_MAX_MES_PIPES];<br>
- uint32_t ucode_fw_version[AMDGPU_MAX_MES_PIPES];<br>
uint64_t uc_start_addr[AMDGPU_MAX_MES_PIPES];<br>
<br>
/* mes ucode data */<br>
struct amdgpu_bo *data_fw_obj[AMDGPU_MAX_MES_PIPES];<br>
uint64_t data_fw_gpu_addr[AMDGPU_MAX_MES_PIPES];<br>
uint32_t *data_fw_ptr[AMDGPU_MAX_MES_PIPES];<br>
- uint32_t data_fw_version[AMDGPU_MAX_MES_PIPES];<br>
uint64_t data_start_addr[AMDGPU_MAX_MES_PIPES];<br>
<br>
/* eop gpu obj */<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br>
index 067d10073a56..1abdf8b7ab50 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br>
@@ -415,10 +415,6 @@ static int mes_v10_1_init_microcode(struct amdgpu_device *adev,<br>
<br>
mes_hdr = (const struct mes_firmware_header_v1_0 *)<br>
adev->mes.fw[pipe]->data;<br>
- adev->mes.ucode_fw_version[pipe] =<br>
- le32_to_cpu(mes_hdr->mes_ucode_version);<br>
- adev->mes.ucode_fw_version[pipe] =<br>
- le32_to_cpu(mes_hdr->mes_ucode_data_version);<br>
adev->mes.uc_start_addr[pipe] =<br>
le32_to_cpu(mes_hdr->mes_uc_start_addr_lo) |<br>
((uint64_t)(le32_to_cpu(mes_hdr->mes_uc_start_addr_hi)) << 32);<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br>
index e14f314902b1..27a330f51c7d 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br>
@@ -480,10 +480,6 @@ static int mes_v11_0_init_microcode(struct amdgpu_device *adev,<br>
<br>
mes_hdr = (const struct mes_firmware_header_v1_0 *)<br>
adev->mes.fw[pipe]->data;<br>
- adev->mes.ucode_fw_version[pipe] =<br>
- le32_to_cpu(mes_hdr->mes_ucode_version);<br>
- adev->mes.ucode_fw_version[pipe] =<br>
- le32_to_cpu(mes_hdr->mes_ucode_data_version);<br>
adev->mes.uc_start_addr[pipe] =<br>
le32_to_cpu(mes_hdr->mes_uc_start_addr_lo) |<br>
((uint64_t)(le32_to_cpu(mes_hdr->mes_uc_start_addr_hi)) << 32);<br>
-- <br>
2.25.1<br>
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