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<p class="msipheaderdf3d92d6" style="margin:0in"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:blue">[AMD Official Use Only - General]</span><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Looks good to me, this patch is Reviewed-by: Likun Gao <<a href="mailto:Likun.Gao@amd.com">Likun.Gao@amd.com</a>><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Regards,<o:p></o:p></p>
<p class="MsoNormal">Likun<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b>From:</b> Patel, Krunalkumar Mukeshkumar <KrunalkumarMukeshkumar.Patel@amd.com>
<br>
<b>Sent:</b> Tuesday, November 8, 2022 11:46 AM<br>
<b>To:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Pan, Xinhui <Xinhui.Pan@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Gao, Likun <Likun.Gao@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com><br>
<b>Cc:</b> amd-gfx@lists.freedesktop.org; S, Shirish <Shirish.S@amd.com><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: Add support to clock gating for sdma 5.2.7<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p style="margin:5.0pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:blue">[AMD Official Use Only - General]<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal" style="background:white"><span style="color:#212121">+Likun, Hawking<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Hi,<o:p></o:p></p>
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<p class="MsoNormal" style="background:white"><span style="color:#212121"><o:p> </o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="color:#212121">Can you please help with the review of the patch?<o:p></o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="color:#212121"><o:p> </o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="color:#212121">Thanks and regards<o:p></o:p></span></p>
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<p class="MsoNormal" style="background:white"><span style="color:#212121">Krunal<o:p></o:p></span></p>
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<p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Patel, Krunalkumar Mukeshkumar <<a href="mailto:KrunalkumarMukeshkumar.Patel@amd.com">KrunalkumarMukeshkumar.Patel@amd.com</a>><br>
<b>Sent:</b> Monday, November 7, 2022 1:35:01 PM<br>
<b>To:</b> Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; Pan, Xinhui <<a href="mailto:Xinhui.Pan@amd.com">Xinhui.Pan@amd.com</a>>; Koenig, Christian <<a href="mailto:Christian.Koenig@amd.com">Christian.Koenig@amd.com</a>><br>
<b>Cc:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>>; S, Shirish <<a href="mailto:Shirish.S@amd.com">Shirish.S@amd.com</a>>; Patel, Krunalkumar
Mukeshkumar <<a href="mailto:KrunalkumarMukeshkumar.Patel@amd.com">KrunalkumarMukeshkumar.Patel@amd.com</a>><br>
<b>Subject:</b> [PATCH] drm/amdgpu: Add support to clock gating for sdma 5.2.7</span>
<o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">With this change it will add support for clock gating for sdma 5.2.7<br>
<br>
- Additional changes are to re-arrange the chip version sequentially.<br>
<br>
Signed-off-by: Krunal Patel <<a href="mailto:krunalkumarmukeshkumar.patel@amd.com">krunalkumarmukeshkumar.patel@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 5 +++--<br>
1 file changed, 3 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
index 809eca54fc61..404b255cb4e0 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c<br>
@@ -1647,12 +1647,13 @@ static int sdma_v5_2_set_clockgating_state(void *handle,<br>
<br>
switch (adev->ip_versions[SDMA0_HWIP][0]) {<br>
case IP_VERSION(5, 2, 0):<br>
- case IP_VERSION(5, 2, 2):<br>
case IP_VERSION(5, 2, 1):<br>
+ case IP_VERSION(5, 2, 2):<br>
+ case IP_VERSION(5, 2, 3):<br>
case IP_VERSION(5, 2, 4):<br>
case IP_VERSION(5, 2, 5):<br>
case IP_VERSION(5, 2, 6):<br>
- case IP_VERSION(5, 2, 3):<br>
+ case IP_VERSION(5, 2, 7):<br>
sdma_v5_2_update_medium_grain_clock_gating(adev,<br>
state == AMD_CG_STATE_GATE);<br>
sdma_v5_2_update_medium_grain_light_sleep(adev,<br>
-- <br>
2.25.1<o:p></o:p></p>
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