<div dir="ltr"><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Mon, Mar 20, 2023 at 1:38 PM Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Add UAPI to query the GFX shadow buffer requirements<br>
for preemption on GFX11. UMDs need to specify the shadow<br>
areas for preemption.<br>
<br>
Signed-off-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com" target="_blank">alexander.deucher@amd.com</a>><br>
---<br>
include/uapi/drm/amdgpu_drm.h | 10 ++++++++++<br>
1 file changed, 10 insertions(+)<br>
<br>
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h<br>
index 3d9474af6566..19a806145371 100644<br>
--- a/include/uapi/drm/amdgpu_drm.h<br>
+++ b/include/uapi/drm/amdgpu_drm.h<br>
@@ -886,6 +886,7 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {<br>
#define AMDGPU_INFO_VIDEO_CAPS_DECODE 0<br>
/* Subquery id: Encode */<br>
#define AMDGPU_INFO_VIDEO_CAPS_ENCODE 1<br>
+#define AMDGPU_INFO_CP_GFX_SHADOW_SIZE 0x22<br>
<br>
#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0<br>
#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff<br>
@@ -1203,6 +1204,15 @@ struct drm_amdgpu_info_video_caps {<br>
struct drm_amdgpu_info_video_codec_info codec_info[AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_COUNT];<br>
};<br>
<br>
+struct drm_amdgpu_info_cp_gfx_shadow_size {<br>
+ __u32 shadow_size;<br>
+ __u32 shadow_alignment;<br>
+ __u32 csa_size;<br>
+ __u32 csa_alignment;<br>
+ __u32 gds_size;<br>
+ __u32 gds_alignment;<br></blockquote><div><br></div><div>Can you document the fields? What is CSA? Also, why is GDS there when the hw deprecated it and replaced it with GDS registers?</div><div><br></div><div>Thanks,</div><div>Marek</div></div></div>