<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="#0563C1" vlink="#954F72" style="word-wrap:break-word"> <p style="font-family:Arial;font-size:10pt;color:#008000;margin:15pt;" align="Left"> [Public]<br> </p> <br> <div> <div class="WordSection1"> <p class="MsoNormal"> struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);<br> <br> + /* For Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR.<br> + * Already set up by host driver.<br> + */<br> + if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))<br> + return 0;<o:p></o:p></p> <p class="MsoNormal"><o:p> </o:p></p> <p class="MsoNormal">This will lead to a psp lock leak by acquire_psp_cmd_buf. It needs to put ‘cmd = acquire_psp_cmd_buf(psp);’ after SRIOV check.<o:p></o:p></p> <p class="MsoNormal"><o:p> </o:p></p> <p class="MsoNormal">Regards,<o:p></o:p></p> <p class="MsoNormal">Guchun<o:p></o:p></p> <p class="MsoNormal"><o:p> </o:p></p> <div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt"> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> <p class="MsoNormal"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> <b>On Behalf Of </b>Deucher, Alexander<br> <b>Sent:</b> Tuesday, March 21, 2023 10:30 PM<br> <b>To:</b> Liu01, Tong (Esther) <Tong.Liu01@amd.com>; amd-gfx@lists.freedesktop.org<br> <b>Cc:</b> Xiao, Jack <Jack.Xiao@amd.com>; Chen, Horace <Horace.Chen@amd.com>; Tuikov, Luben <Luben.Tuikov@amd.com>; Quan, Evan <Evan.Quan@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com><br> <b>Subject:</b> Re: [PATCH] drm/amdgpu: skip unload tmr when tmr is not loaded<o:p></o:p></p> </div> </div> <p class="MsoNormal"><o:p> </o:p></p> <p style="margin:15.0pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:green">[Public]<o:p></o:p></span></p> <p class="MsoNormal"><o:p> </o:p></p> <div> <p style="margin:15.0pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:green">[Public]<o:p></o:p></span></p> <p class="MsoNormal"><o:p> </o:p></p> <div> <div> <p class="MsoNormal" style="background:white"><span style="font-size:12.0pt;color:black">Reviewed-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>><o:p></o:p></span></p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> <p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Tong Liu01 <<a href="mailto:Tong.Liu01@amd.com">Tong.Liu01@amd.com</a>><br> <b>Sent:</b> Tuesday, March 21, 2023 5:19 AM<br> <b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br> <b>Cc:</b> Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>>; Chen, Horace <<a href="mailto:Horace.Chen@amd.com">Horace.Chen@amd.com</a>>; Tuikov, Luben <<a href="mailto:Luben.Tuikov@amd.com">Luben.Tuikov@amd.com</a>>; Koenig, Christian <<a href="mailto:Christian.Koenig@amd.com">Christian.Koenig@amd.com</a>>; Deucher, Alexander <<a href="mailto:Alexander.Deucher@amd.com">Alexander.Deucher@amd.com</a>>; Xiao, Jack <<a href="mailto:Jack.Xiao@amd.com">Jack.Xiao@amd.com</a>>; Zhang, Hawking <<a href="mailto:Hawking.Zhang@amd.com">Hawking.Zhang@amd.com</a>>; Liu01, Tong (Esther) <<a href="mailto:Tong.Liu01@amd.com">Tong.Liu01@amd.com</a>><br> <b>Subject:</b> [PATCH] drm/amdgpu: skip unload tmr when tmr is not loaded</span> <o:p></o:p></p> <div> <p class="MsoNormal"> <o:p></o:p></p> </div> </div> <div> <div> <p class="MsoNormal" style="margin-bottom:12.0pt">[why]<br> For Navi12 and CHIP_SIENNA_CICHLID SRIOV, TMR is not loaded. Should<br> also skip tmr unload<br> <br> Signed-off-by: Tong Liu01 <<a href="mailto:Tong.Liu01@amd.com">Tong.Liu01@amd.com</a>><br> ---<br> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 6 ++++++<br> 1 file changed, 6 insertions(+)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br> index 0b9e99c35a05..69addf2751aa 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br> @@ -841,6 +841,12 @@ static int psp_tmr_unload(struct psp_context *psp)<br> int ret;<br> struct psp_gfx_cmd_resp *cmd = acquire_psp_cmd_buf(psp);<br> <br> + /* For Navi12 and CHIP_SIENNA_CICHLID SRIOV, do not set up TMR.<br> + * Already set up by host driver.<br> + */<br> + if (amdgpu_sriov_vf(psp->adev) && psp_skip_tmr(psp))<br> + return 0;<br> +<br> psp_prep_tmr_unload_cmd_buf(psp, cmd);<br> dev_dbg(psp->adev->dev, "free PSP TMR buffer\n");<br> <br> -- <br> 2.34.1<o:p></o:p></p> </div> </div> </div> </div> </div> </div> </div> </body> </html>