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[AMD Official Use Only - General]<br>
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<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt">Series is<o:p></o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt">Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com><o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt"><o:p> </o:p></span></p>
<p class="MsoNormal"><span lang="EN-US" style="font-size:11.0pt">Regards,<br>
Hawking<o:p></o:p></span></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"><b><span style="font-size:12.0pt;color:black">From:
</span></b><span style="font-size:12.0pt;color:black">Horatio Zhang <Hongkun.Zhang@amd.com><br>
<b>Date: </b>Tuesday, April 25, 2023 at 14:38<br>
<b>To: </b>Zhang, Hawking <Hawking.Zhang@amd.com>, Koenig, Christian <Christian.Koenig@amd.com>, amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc: </b>Chen, Guchun <Guchun.Chen@amd.com>, Xu, Feifei <Feifei.Xu@amd.com>, Yao, Longlong <Longlong.Yao@amd.com>, Zhang, Horatio <Hongkun.Zhang@amd.com><br>
<b>Subject: </b>[PATCH v2 3/3] drm/amdgpu: fix amdgpu_irq_put call trace in gmc_v10_0_hw_fini<o:p></o:p></span></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:11.0pt">The gmc.ecc_irq is enabled by firmware per IFWI setting,<br>
and the host driver is not privileged to enable/disable<br>
the interrupt. So, it is meaningless to use the amdgpu_irq_put<br>
function in gmc_v10_0_hw_fini, which also leads to the call<br>
trace.<br>
<br>
[   82.340264] Call Trace:<br>
[   82.340265]  <TASK><br>
[   82.340269]  gmc_v10_0_hw_fini+0x83/0xa0 [amdgpu]<br>
[   82.340447]  gmc_v10_0_suspend+0xe/0x20 [amdgpu]<br>
[   82.340623]  amdgpu_device_ip_suspend_phase2+0x127/0x1c0 [amdgpu]<br>
[   82.340789]  amdgpu_device_ip_suspend+0x3d/0x80 [amdgpu]<br>
[   82.340955]  amdgpu_device_pre_asic_reset+0xdd/0x2b0 [amdgpu]<br>
[   82.341122]  amdgpu_device_gpu_recover.cold+0x4dd/0xbb2 [amdgpu]<br>
[   82.341359]  amdgpu_debugfs_reset_work+0x4c/0x70 [amdgpu]<br>
[   82.341529]  process_one_work+0x21d/0x3f0<br>
[   82.341535]  worker_thread+0x1fa/0x3c0<br>
[   82.341538]  ? process_one_work+0x3f0/0x3f0<br>
[   82.341540]  kthread+0xff/0x130<br>
[   82.341544]  ? kthread_complete_and_exit+0x20/0x20<br>
[   82.341547]  ret_from_fork+0x22/0x30<br>
<br>
Signed-off-by: Horatio Zhang <Hongkun.Zhang@amd.com><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 -<br>
 1 file changed, 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c<br>
index 23d4081eca00..5697b66bf0de 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c<br>
@@ -1143,7 +1143,6 @@ static int gmc_v10_0_hw_fini(void *handle)<br>
                 return 0;<br>
         }<br>
 <br>
-       amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);<br>
         amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);<br>
 <br>
         return 0;<br>
-- <br>
2.34.1<o:p></o:p></span></p>
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