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[AMD Official Use Only - General]<br>
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Yes, it should work. If that, the routine would behave like *reset*. That means driver would behave like to create a new queue instead of restoring a saved queue. I can have a try with this solution.</div>
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Regards,</div>
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Jack</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Alex Deucher <alexdeucher@gmail.com><br>
<b>Sent:</b> Monday, 15 May 2023 21:08<br>
<b>To:</b> Xiao, Jack <Jack.Xiao@amd.com><br>
<b>Cc:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org>; Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: fix S3 issue if MQD in VRAM</font>
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<div class="PlainText">On Mon, May 15, 2023 at 6:40 AM Xiao, Jack <Jack.Xiao@amd.com> wrote:<br>
><br>
> [AMD Official Use Only - General]<br>
><br>
> The MQD data in VRAM would be lost after S3, for the MQD bo is pinned down as kernel bo and can't be evicted to system memory.<br>
> AFAIK, driver should not to do allocate/free memory during S3, as there are issues observed to do memory allocation during S3.<br>
<br>
We restore the contents of the MQD in gfx_v*_0_gfx_init_queue() and<br>
gfx_v*_0_kcq_init_queue().<br>
<br>
Alex<br>
<br>
><br>
> Regards,<br>
> Jack<br>
><br>
> -----Original Message-----<br>
> From: Alex Deucher <alexdeucher@gmail.com><br>
> Sent: Friday, May 12, 2023 9:13 PM<br>
> To: Xiao, Jack <Jack.Xiao@amd.com><br>
> Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher@amd.com><br>
> Subject: Re: [PATCH] drm/amdgpu: fix S3 issue if MQD in VRAM<br>
><br>
> On Fri, May 12, 2023 at 4:16 AM Jack Xiao <Jack.Xiao@amd.com> wrote:<br>
> ><br>
> > Make the preemption optimization effect only for SRIOV, for it caused<br>
> > failure to resume from S3.<br>
><br>
> Can you elaborate? We ultimately want MQDs in VRAM for performance reasons even for bare metal.<br>
><br>
> Alex<br>
><br>
> ><br>
> > Signed-off-by: Jack Xiao <Jack.Xiao@amd.com><br>
> > ---<br>
> > drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 3 ++-<br>
> > drivers/gpu/drm/amd/amdgpu/mes_v10_1.c | 7 +++++--<br>
> > drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 7 +++++--<br>
> > 3 files changed, 12 insertions(+), 5 deletions(-)<br>
> ><br>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br>
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br>
> > index a22d88a4178a..1b795b7bbf38 100644<br>
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br>
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c<br>
> > @@ -385,7 +385,8 @@ int amdgpu_gfx_mqd_sw_init(struct amdgpu_device *adev,<br>
> > u32 domain = AMDGPU_GEM_DOMAIN_GTT;<br>
> ><br>
> > /* Only enable on gfx10 and 11 for now to avoid changing behavior on older chips */<br>
> > - if (adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 0, 0))<br>
> > + if (adev->ip_versions[GC_HWIP][0] >= IP_VERSION(10, 0, 0) &&<br>
> > + amdgpu_sriov_vf(adev))<br>
> > domain |= AMDGPU_GEM_DOMAIN_VRAM;<br>
> ><br>
> > /* create MQD for KIQ */<br>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br>
> > b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br>
> > index 4560476c7c31..5c3d3f6c7ebd 100644<br>
> > --- a/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br>
> > +++ b/drivers/gpu/drm/amd/amdgpu/mes_v10_1.c<br>
> > @@ -889,6 +889,7 @@ static int mes_v10_1_mqd_sw_init(struct<br>
> > amdgpu_device *adev, {<br>
> > int r, mqd_size = sizeof(struct v10_compute_mqd);<br>
> > struct amdgpu_ring *ring;<br>
> > + u32 domain = AMDGPU_GEM_DOMAIN_GTT;<br>
> ><br>
> > if (pipe == AMDGPU_MES_KIQ_PIPE)<br>
> > ring = &adev->gfx.kiq[0].ring; @@ -900,9 +901,11 @@<br>
> > static int mes_v10_1_mqd_sw_init(struct amdgpu_device *adev,<br>
> > if (ring->mqd_obj)<br>
> > return 0;<br>
> ><br>
> > + if (amdgpu_sriov_vf(adev))<br>
> > + domain |= AMDGPU_GEM_DOMAIN_VRAM;<br>
> > +<br>
> > r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,<br>
> > - AMDGPU_GEM_DOMAIN_VRAM |<br>
> > - AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,<br>
> > + domain, &ring->mqd_obj,<br>
> > &ring->mqd_gpu_addr, &ring->mqd_ptr);<br>
> > if (r) {<br>
> > dev_warn(adev->dev, "failed to create ring mqd bo<br>
> > (%d)", r); diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br>
> > b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br>
> > index 3adb450eec07..79a4d2bfd94a 100644<br>
> > --- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br>
> > +++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c<br>
> > @@ -987,6 +987,7 @@ static int mes_v11_0_mqd_sw_init(struct<br>
> > amdgpu_device *adev, {<br>
> > int r, mqd_size = sizeof(struct v11_compute_mqd);<br>
> > struct amdgpu_ring *ring;<br>
> > + u32 domain = AMDGPU_GEM_DOMAIN_GTT;<br>
> ><br>
> > if (pipe == AMDGPU_MES_KIQ_PIPE)<br>
> > ring = &adev->gfx.kiq[0].ring; @@ -998,9 +999,11 @@<br>
> > static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev,<br>
> > if (ring->mqd_obj)<br>
> > return 0;<br>
> ><br>
> > + if (amdgpu_sriov_vf(adev))<br>
> > + domain |= AMDGPU_GEM_DOMAIN_VRAM;<br>
> > +<br>
> > r = amdgpu_bo_create_kernel(adev, mqd_size, PAGE_SIZE,<br>
> > - AMDGPU_GEM_DOMAIN_VRAM |<br>
> > - AMDGPU_GEM_DOMAIN_GTT, &ring->mqd_obj,<br>
> > + domain, &ring->mqd_obj,<br>
> > &ring->mqd_gpu_addr, &ring->mqd_ptr);<br>
> > if (r) {<br>
> > dev_warn(adev->dev, "failed to create ring mqd bo<br>
> > (%d)", r);<br>
> > --<br>
> > 2.37.3<br>
> ><br>
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