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[AMD Official Use Only - General]<br>
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Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Huang, Tim <Tim.Huang@amd.com><br>
<b>Sent:</b> Tuesday, May 23, 2023 1:02 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Yifan <Yifan1.Zhang@amd.com>; Huang, Tim <Tim.Huang@amd.com><br>
<b>Subject:</b> [PATCH] drm/amd/pm: reverse mclk and fclk clocks levels for renoir</font>
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<div class="PlainText">This patch reverses the DPM clocks levels output of pp_dpm_mclk<br>
and pp_dpm_fclk for renoir.<br>
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On dGPUs and older APUs we expose the levels from lowest clocks<br>
to highest clocks. But for some APUs, the clocks levels are<br>
given the reversed orders by PMFW. Like the memory DPM clocks<br>
that are exposed by pp_dpm_mclk.<br>
<br>
It's not intuitive that they are reversed on these APUs. All tools<br>
and software that talks to the driver then has to know different ways<br>
to interpret the data depending on the asic.<br>
<br>
So we need to reverse them to expose the clocks levels from the<br>
driver consistently.<br>
<br>
Signed-off-by: Tim Huang <Tim.Huang@amd.com><br>
---<br>
drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 5 +++--<br>
1 file changed, 3 insertions(+), 2 deletions(-)<br>
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diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c<br>
index 5cdc07165480..8a8ba25c9ad7 100644<br>
--- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c<br>
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c<br>
@@ -494,7 +494,7 @@ static int renoir_set_fine_grain_gfx_freq_parameters(struct smu_context *smu)<br>
static int renoir_print_clk_levels(struct smu_context *smu,<br>
enum smu_clk_type clk_type, char *buf)<br>
{<br>
- int i, size = 0, ret = 0;<br>
+ int i, idx, size = 0, ret = 0;<br>
uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;<br>
SmuMetrics_t metrics;<br>
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);<br>
@@ -594,7 +594,8 @@ static int renoir_print_clk_levels(struct smu_context *smu,<br>
case SMU_VCLK:<br>
case SMU_DCLK:<br>
for (i = 0; i < count; i++) {<br>
- ret = renoir_get_dpm_clk_limited(smu, clk_type, i, &value);<br>
+ idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? (count - i - 1) : i;<br>
+ ret = renoir_get_dpm_clk_limited(smu, clk_type, idx, &value);<br>
if (ret)<br>
return ret;<br>
if (!value)<br>
-- <br>
2.34.1<br>
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