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[AMD Official Use Only - General]<br>
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Acked-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Lazar, Lijo <Lijo.Lazar@amd.com><br>
<b>Sent:</b> Tuesday, July 25, 2023 9:48 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Zhang, Hawking <Hawking.Zhang@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu: Match against exact bootloader status</font>
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<div class="PlainText">On PSP v13.x ASICs, boot loader will set only the MSB to 1 and clear the<br>
least significant bits for any command submission. Hence match against<br>
the exact register value, otherwise a register value of all 0xFFs also<br>
could falsely indicate that boot loader is ready. Also, from PSP v13.0.6<br>
and newer, bits[7:0] will be used to indicate command error status.<br>
<br>
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c | 15 ++++++++-------<br>
1 file changed, 8 insertions(+), 7 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c<br>
index e1a392bcea70..af5685f4cb34 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v13_0.c<br>
@@ -137,14 +137,15 @@ static int psp_v13_0_wait_for_bootloader(struct psp_context *psp)<br>
int ret;<br>
int retry_loop;<br>
<br>
+ /* Wait for bootloader to signify that it is ready having bit 31 of<br>
+ * C2PMSG_35 set to 1. All other bits are expected to be cleared.<br>
+ * If there is an error in processing command, bits[7:0] will be set.<br>
+ * This is applicable for PSP v13.0.6 and newer.<br>
+ */<br>
for (retry_loop = 0; retry_loop < 10; retry_loop++) {<br>
- /* Wait for bootloader to signify that is<br>
- ready having bit 31 of C2PMSG_35 set to 1 */<br>
- ret = psp_wait_for(psp,<br>
- SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),<br>
- 0x80000000,<br>
- 0x80000000,<br>
- false);<br>
+ ret = psp_wait_for(<br>
+ psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),<br>
+ 0x80000000, 0xffffffff, false);<br>
<br>
if (ret == 0)<br>
return 0;<br>
-- <br>
2.25.1<br>
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