<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=gb2312">
</head>
<body>
<p style="font-family:Arial;font-size:10pt;color:#008000;margin:15pt;font-style:normal;font-weight:normal;text-decoration:none;" align="Left">
[Public]<br>
</p>
<br>
<div>
<div dir="ltr">
<div></div>
<div>
<div>
<div dir="ltr">Ping</div>
</div>
</div>
</div>
<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>发件人:</b> Yu, Lang <Lang.Yu@amd.com><br>
<b>发送时间:</b> Tuesday, August 1, 2023 3:38:32 PM<br>
<b>收件人:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>抄送:</b> Koenig, Christian <Christian.Koenig@amd.com>; Paneer Selvam, Arunpravin <Arunpravin.PaneerSelvam@amd.com>; Zhang, Yifan <Yifan1.Zhang@amd.com>; Yu, Lang <Lang.Yu@amd.com><br>
<b>主题:</b> [PATCH] drm/amdgpu: add support to create large TMR BO for APU</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">TMR requires physical contiguous memory, amdgpu_bo_create_kernel()<br>
can't satisfy large(>128MB) physical contiguous memory allocation<br>
request with default 512MB VRAM on APU.<br>
<br>
When requested TMR size > 128MB, use amdgpu_bo_create_kernel_at()<br>
to create the BO at offset 32MB with a step 1MB in the VRAM range.<br>
<br>
Signed-off-by: Lang Yu <Lang.Yu@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 38 +++++++++++++++++++++++--<br>
1 file changed, 35 insertions(+), 3 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
index 15217e33b51d..3fadfaa63b2e 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
@@ -783,6 +783,34 @@ static bool psp_boottime_tmr(struct psp_context *psp)<br>
}<br>
}<br>
<br>
+static int psp_create_large_tmr_bo_for_apu(struct psp_context *psp,<br>
+ int tmr_size,<br>
+ void **cpu_addr)<br>
+{<br>
+ struct amdgpu_vram_mgr *mgr = &psp->adev->mman.vram_mgr;<br>
+ uint32_t rounded_size = round_up(tmr_size, 0x100000);<br>
+ uint32_t start = 0x2000000;<br>
+ uint32_t step = 0x100000;<br>
+ int ret = -ENOMEM;<br>
+<br>
+ for (; start + rounded_size <= mgr->manager.size &&<br>
+ start + step <= mgr->manager.size; start += step) {<br>
+<br>
+ ret = amdgpu_bo_create_kernel_at(psp->adev, start, tmr_size,<br>
+ &psp->tmr_bo, cpu_addr);<br>
+ if (ret == -ENOMEM)<br>
+ continue;<br>
+ if (ret)<br>
+ return ret;<br>
+<br>
+ psp->tmr_mc_addr = amdgpu_bo_gpu_offset(psp->tmr_bo);<br>
+<br>
+ break;<br>
+ }<br>
+<br>
+ return ret;<br>
+}<br>
+<br>
/* Set up Trusted Memory Region */<br>
static int psp_tmr_init(struct psp_context *psp)<br>
{<br>
@@ -813,8 +841,13 @@ static int psp_tmr_init(struct psp_context *psp)<br>
}<br>
}<br>
<br>
- if (!psp->tmr_bo) {<br>
- pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;<br>
+ if (psp->tmr_bo)<br>
+ return 0;<br>
+<br>
+ pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;<br>
+ if (psp->adev->flags & AMD_IS_APU && tmr_size > 0x8000000)<br>
+ ret = psp_create_large_tmr_bo_for_apu(psp, tmr_size, pptr);<br>
+ else<br>
ret = amdgpu_bo_create_kernel(psp->adev, tmr_size,<br>
PSP_TMR_ALIGNMENT,<br>
AMDGPU_HAS_VRAM(psp->adev) ?<br>
@@ -822,7 +855,6 @@ static int psp_tmr_init(struct psp_context *psp)<br>
AMDGPU_GEM_DOMAIN_GTT,<br>
&psp->tmr_bo, &psp->tmr_mc_addr,<br>
pptr);<br>
- }<br>
<br>
return ret;<br>
}<br>
-- <br>
2.25.1<br>
<br>
</div>
</span></font></div>
</div>
</body>
</html>