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[AMD Official Use Only - General]<br>
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<div class="elementToProof"><span style="font-size: 14.6667px; color: rgb(0, 0, 0);">Reviewed-by: Timmy Tsai <timmtsai@amd.com></span><br>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size: 11pt; color: rgb(0, 0, 0);"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Alex Deucher <alexander.deucher@amd.com><br>
<b>Sent:</b> Thursday, September 7, 2023 3:47 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu/nbio4.3: set proper rmmio_remap.reg_offset for SR-IOV</font>
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<div class="x_PlainText">Needed for HDP flush to work correctly.<br>
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Signed-off-by: Alex Deucher <alexander.deucher@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c | 3 +++<br>
1 file changed, 3 insertions(+)<br>
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diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c<br>
index d5ed9e0e1a5f..e5b5b0f4940f 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c<br>
@@ -345,6 +345,9 @@ static void nbio_v4_3_init_registers(struct amdgpu_device *adev)<br>
data &= ~RCC_DEV0_EPF2_STRAP2__STRAP_NO_SOFT_RESET_DEV0_F2_MASK;<br>
WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2, data);<br>
}<br>
+ if (amdgpu_sriov_vf(adev))<br>
+ adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,<br>
+ regBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;<br>
}<br>
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static u32 nbio_v4_3_get_rom_offset(struct amdgpu_device *adev)<br>
-- <br>
2.41.0<br>
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