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[AMD Official Use Only - General]<br>
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Hey Chris,</div>
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Yes, we use bitfield as flags to control certain features.</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Christian König <ckoenig.leichtzumerken@gmail.com><br>
<b>Sent:</b> Monday, October 16, 2023 1:58 PM<br>
<b>To:</b> Zhang, Bokun <Bokun.Zhang@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> Re: [PATCH v4 1/4] drm/amd/amdgpu/vcn: Add RB decouple feature under SRIOV - P1</font>
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<div class="PlainText">Am 16.10.23 um 18:52 schrieb Bokun Zhang:<br>
> - Update SRIOV header with RB decouple flag<br>
><br>
> Signed-off-by: Bokun Zhang <bokun.zhang@amd.com><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h | 5 +++--<br>
> 1 file changed, 3 insertions(+), 2 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h<br>
> index 104a5ad8397d..51a14f6d93bd 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h<br>
> @@ -90,10 +90,11 @@ union amd_sriov_msg_feature_flags {<br>
> uint32_t host_load_ucodes : 1;<br>
> uint32_t host_flr_vramlost : 1;<br>
> uint32_t mm_bw_management : 1;<br>
> - uint32_t pp_one_vf_mode : 1;<br>
> + uint32_t pp_one_vf_mode : 1;<br>
> uint32_t reg_indirect_acc : 1;<br>
> uint32_t av1_support : 1;<br>
> - uint32_t reserved : 25;<br>
> + uint32_t vcn_rb_decouple : 1;<br>
> + uint32_t reserved : 24;<br>
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Are you guys using bitfields for SRIOV guest<->host communication?<br>
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Christian.<br>
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> } flags;<br>
> uint32_t all;<br>
> };<br>
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